EP610JI-30 vs EP610ILC-25 Perbandingan

Perbandingan bersamaan detil EP610JI-30 dari Altera dan EP610ILC-25 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP610JI-30 EP610ILC-25
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family Altera Classic EPLD (EP610) Classic EPLD (EP610 series)
Device Type UV Erasable Programmable Logic Device (EPLD) EEPLD (Electrically Erasable PLD)
Macrocells 16 16
Propagation Delay (tpd) 30 ns (max) —
Pipelined Data Rate Up to 100 MHz —
Product Terms 160 160
Dedicated Inputs 4 4
I/O Pins 16 —
External Clocks 2 —
Tegangan Pemuat 5 V (single supply) —
Process Technology CMOS CMOS, electrically erasable
Paket CQCC28 (windowed ceramic JLCC, J-bend) 28-pin PLCC (J-lead)
Package Code JLCC-28 / CQCC28 —
Erasure Method Ultraviolet (UV) via top window —
Programming Altera Logic Programmer compatible —
Suhu Kerja -40C to +85C (industrial, per EP610 family suffix convention) —
Tipe Mounting Surface Mount (JLCC) Surface Mount
Status RoHS [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
Usable Gates — 300
Maximum Operating Frequency (fMAX) — 40 MHz
Pin-to-Pin Propagation Delay (tPD) — 25 ns
Supply Voltage (VCC) — 4.75 V to 5.25 V
Nominal Supply Voltage — 5 V
Total Inputs — 20
Bidirectional I/O Pins — 16
Rentang Suhu Kerja — 0 C to +70 C (commercial)
Programming Method — In-system, electrically erasable

Spek dan Sumber

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