EP910LC44-35 vs EP910LC-35T Perbandingan
Perbandingan bersamaan detil EP910LC44-35 dari Intel dan EP910LC-35T dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP910LC44-35 | EP910LC-35T |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Family | Classic EPLD (OT sub-family) | Classic EPLD (EP910) |
| Architecture | PAL-type AND/OR array | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns (max) | 35 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Total Inputs | 36 | — |
| I/O Pins | 24 | — |
| Global Clocks | 2 | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Suhu Kerja | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Paket | 44-pin PLCC (J-leaded) | PLCC-44 (J-lead) |
| Tipe Mounting | Surface Mount | Surface Mount (PLCC socket or solder) |
| Process Technology | CMOS | CMOS (EPROM-based) |
| Programmability | UV-erasable (windowed ceramic) | — |
| Logic Capacity | — | 450 usable gates |
| Maximum Operating Frequency | — | 28.6 MHz |
| User I/O Pins | — | 36 |
| Erasure Method | — | UV-erasable window (ceramic package) / OTP (plastic) |
| Programming | — | Altera programming hardware + MAX+PLUS II |
| Level MSL | — | MSL 3 (168 hours) |
| Status RoHS | — | [DATA_NEEDED: RoHS status not in verified data] |