EP910PC-35 vs EP910PI-35T Perbandingan

Perbandingan bersamaan detil EP910PC-35 dari Altera dan EP910PI-35T dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910PC-35 EP910PI-35T
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD Altera Classic EPLD
Device Type EPLD (Erasable Programmable Logic Device) Erasable Programmable Logic Device (EPLD)
Macrocells 24 24
I/O Pins 24 —
Dedicated Inputs 12 —
Total Inputs 36 —
Product Terms 240 —
Propagation Delay (tPD) 35 ns —
Maximum Counter Frequency 37 MHz —
Internal Performance Frequency 100 MHz —
Technology CMOS, UV-erasable/OTP —
Tegangan Pemuat 5 V —
Suhu Kerja [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Paket 40-pin PDIP (Plastic DIP) 40-pin PDIP (Plastic DIP)
Tipe Mounting Through-Hole Through-Hole
Architecture PAL-type sum-of-products, AND/OR array —
Programming Method UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools UV-erasable, EPROM technology
Compliance / RoHS [DATA_NEEDED: RoHS status - legacy part] —
Usable Gates — 450
Pin-to-Pin Logic Delay (tpd) — 35 ns
Counter Frequency (fCNT) — 28.6 MHz
Supply Voltage (VCC) — 5 V
I/O Logic Compatibility — 100% TTL emulation
Process Technology — CMOS
On-board Test Circuitry — Yes (logic test mode for AC verification)
Status RoHS — [DATA_NEEDED: RoHS compliance status]
Level MSL — [DATA_NEEDED: MSL level]

Spek dan Sumber

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