EPC16QC100N vs EPC16QC100II Perbandingan

Perbandingan bersamaan detil EPC16QC100N dari Altera dan EPC16QC100II dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC16QC100N EPC16QC100II
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete NRND
Ukuran Memori 16 Mbit (16,777,216 bits) —
Programmable Type In System Programmable —
Configuration Clock Frequency 33 MHz max —
On-Chip Decompression Yes (supports compressed bitstreams) —
Supply Voltage (VCC) 3.0 V to 3.6 V —
Access Time 90 ns typical —
Flash Read Bandwidth 160 Mbps (16-bit DQ at 10 MHz) —
Configuration Interface FPP / PS / AS via dedicated FPGA pins —
JTAG (IEEE 1149.1) ISP Supported —
Suhu Kerja 0 C to 70 C -40C to +85C (Industrial)
Paket 100-pin PQFP (20 x 14 mm) 100-pin PQFP (Plastic Quad Flat Pack)
Tipe Mounting Surface Mount —
Lead Free Yes (per datasheet) —
Packaging Tray —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone
Tipe Memori — FPGA Configuration PROM (Flash-based)
Memory Density — 16 Mbit
Configuration Mode — FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous)
Programmability — In-System Programmable via IEEE 1149.1 (JTAG)
Cascade Support — Yes (multi-PROM cascading supported)
Core Supply Voltage — 3.3 V
I/O Tolerance — 5 V tolerant configuration pins
Package Dimensions — 20 mm x 14 mm, 0.5 mm pitch
Lead Finish — Matte Tin (lead-free)
Level MSL — 3 (per JEDEC J-STD-020)
Status RoHS — Compliant
Configuration Pins — DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE
Compression Support — Yes (reduces on-PROM footprint vs uncompressed bitstream)

Spek dan Sumber

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