EPC2L120N vs EPC2L20U Perbandingan

Perbandingan bersamaan detil EPC2L120N dari Intel dan EPC2L20U dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPC2L20U EPC2L20U - 1.6Mb Configuration PROM 20-PLCC | Altera

EPC2L20U - 1.6Mb Configuration PROM 20-PLCC | Altera

EPC2L20U ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPC2L120N EPC2L20U
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Waktu Pembelian Terakhir
Device Type Configuration Device for SRAM-based LUT FPGAs —
Manufacturer Intel (formerly Altera) —
Family EPC2 (Enhanced Configuration Device) —
Memory Capacity 165,888 bits (400,000 gates equivalent) —
Operating Voltage (VCCIO) 2.7 V to 3.6 V —
5V Tolerance Yes (5V-tolerant I/O) —
Configuration Clock (FPP) Up to 66 MHz —
Configuration Clock (PS) Up to 33 MHz —
Internal Oscillator 8 MHz with programmable divider —
JTAG Interface IEEE Std 1149.1 compliant, ISP support —
Programming Cycles 100,000 erase/program cycles —
Sector Erase Time [DATA_NEEDED: typical sector erase time] —
Paket 84-pin PLCC (J-Lead) 20-PLCC (PLCC-20)
Configuration Schemes FPP, PS, JTAG, daisy chain —
Suhu Kerja [DATA_NEEDED: industrial temp range] -40C to +85C (industrial)
Supported FPGA Families Cyclone, APEX, FLEX, Mercury, ACEX, Stratix —
Status RoHS unknown [DATA_NEEDED: RoHS status]
Ukuran Memori — 1.6 Mbit
Supply Voltage (VCC) — 3.0 V to 3.6 V
Tipe Antarmuka — Serial configuration (DCLK/DATA0)
Programmability — In-system programmable via IEEE 1532 / JTAG
Supported FPGAs — APEX II, APEX 20K, Mercury, Stratix, Cyclone, ACEX 1K
Configuration Mode — Single + Cascade (multi-PROM daisy chain)
Compression Support — Yes (FPGA decompresses bitstream)
Tipe Mounting — Surface Mount / Socket
JTAG Support — Yes (IEEE Std 1149.1 boundary scan)
Jumlah Pin — 20
Lead-Free — [DATA_NEEDED: lead-free status]
Level MSL — [DATA_NEEDED: MSL level]

Spek dan Sumber

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