EPC2L20 vs EPC2LI20 Perbandingan

Perbandingan bersamaan detil EPC2L20 dari Altera dan EPC2LI20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2L20 EPC2LI20
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete NRND
Tipe Memori Configuration PROM (non-volatile) Flash (in-system programmable)
Ukuran Memori 1.6 Mbit 1.6 Mb (1,572,864 bits)
Organisasi 8-bit byte —
Antarmuka Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) —
Programmability In-system programmable via JTAG —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5.0 V (VCCSEL selectable) —
Cascade Support Yes - multi-device daisy chain —
Boundary Scan JTAG IEEE 1149.1 BST —
Paket 20-pin PLCC (J-lead) —
Tipe Mounting Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
Suhu Kerja [DATA_NEEDED: operating temperature range] -40 C to +85 C (Industrial)
Level MSL [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
Status RoHS RoHS Compliant (per IC Components listing) [DATA_NEEDED: RoHS status]
Process Technology Low-power CMOS —
Target FPGAs APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix —
Programmable Type — In System Programmable (ISP)
Fungsi — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
Paket / Case — 20-PLCC (J-lead, 9x9 mm)
Configuration Interface — Serial or Byte-wide (parallel)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

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