EPC2L20N vs EPC2LC02N Perbandingan

Perbandingan bersamaan detil EPC2L20N dari Altera dan EPC2LC02N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2L20N EPC2LC02N
Merek Altera Intel
Kategori Memory ICs FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Fungsi In-System Programmable Configuration PROM for SRAM-based LUT FPGAs —
Ukuran Memori 1.6 Mbit —
Programmable Type In System Programmable (ISP) —
Supply Voltage - VCCINT/VCCIO 3.0 V to 3.6 V or 4.5 V to 5.5 V —
Paket / Case 20-LCC (J-Lead), PLCC-20 —
Packaging Tube —
Suhu Kerja 0C to +70C (commercial) -40C to +85C (industrial)
Supported FPGA Families Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) APEX II, APEX 20K, ACEX 1K, FLEX 10K, Mercury, Stratix (partial)
Configuration Interface Serial (Altera FPP / PS configuration scheme) —
Cascade Support Yes (multi-PROM chain via CE control) —
Programming Method In-system via 4-wire ISP / JTAG-style —
Tipe Mounting Surface Mount (J-Lead PLCC) Surface Mount / Socket
Jumlah Pin 20 —
Lead Finish Matte Tin (Pb-free) —
Level MSL 3 (168 hours) [DATA_NEEDED: MSL level]
Status RoHS Compliant —
Device Type — Enhanced Configuration Device (Configuration PROM)
Memory Density — 1.6 Mbit
Supply Voltage (VCC) — 3.0 V to 3.6 V
Antarmuka — Serial or Parallel FPGA configuration, JTAG (IEEE 1149.1) ISP
Programmability — In-System Programmable (ISP) via JTAG
Configuration Mode — Serial / Parallel / Multi-device daisy-chain
Paket — 20-pin PLCC (Plastic Leaded Chip Carrier)
Package Code — L (PLCC-20, leaded)
JTAG Compliance — IEEE 1149.1 (TAP controller with 4-wire interface)
DC Input Voltage (absolute max) — -0.3 V to +7.0 V (transients to -2.0 V / +7.0 V for <20 ns)
Lead-Free / RoHS — Lead finish version dependent (Pb-free and SnPb variants exist)
Programming Cycles — 100 typical (flash endurance, per datasheet)

Spek dan Sumber

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