EPC2LI20PULLS vs EPC2LI20J Perbandingan
Perbandingan bersamaan detil EPC2LI20PULLS dari Intel dan EPC2LI20J dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPC2LI20PULLS | EPC2LI20J |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | Memory ICs | Memory ICs |
| Status Lingkungan Hidup | Obsolete | Aktif |
| Tipe Memori | Serial Configuration Flash PROM | In-System Programmable Configuration PROM (flash) |
| Ukuran Memori | 1.6 Mbit | 1,695,680 bits (1.6Mb) |
| Configuration Interface | Serial (Altera FPP / PS modes) | — |
| Frekuensi Bawah Maximum | 10 MHz | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Tolerance | 5 V tolerant configuration pins | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Compression Support | Yes (real-time decompression in target FPGA) | — |
| Multi-Device Cascade | Yes (daisy-chain supported) | — |
| Suhu Kerja | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Paket | 20-pin PLCC (J-Lead, 9x9 mm) | 20-pin PLCC with J-leads (JEDEC MS-018) |
| Tipe Mounting | Surface Mount / Socket | — |
| Level MSL | 3 (168 hours) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free finish] | [DATA_NEEDED: lead-free status] |
| Compatible FPGA Families | Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur | — |
| Organisasi | — | 65,536 x 1-bit (serial interface) |
| Antarmuka | — | Altera 4-pin serial configuration (DATA, DCLK, nCS, nCONFIG) |
| Target FPGAs | — | APEX II, APEX 20K/20KC/20KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage (VCCIO) | — | 5.0 V or 3.3 V tolerant |
| ISP Programming Interface | — | JTAG (IEEE 1149.1) |
| Cascade Support | — | Yes (multi-device configuration chain) |
| Internal Oscillator | — | Yes (configures without external clock source) |
| Programming Cycles | — | [DATA_NEEDED: minimum endurance cycles] |
| Configuration Clock (DCLK) | — | Up to 33 MHz |