EPC2LI20PULLS vs EPC2LI20J 比較
詳細並排比較 EPC2LI20PULLS 由 Intel 與 EPC2LI20J 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LI20PULLS | EPC2LI20J |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | 啟用中 |
| 記憶體類型 | Serial Configuration Flash PROM | In-System Programmable Configuration PROM (flash) |
| 記憶體容量 | 1.6 Mbit | 1,695,680 bits (1.6Mb) |
| Configuration Interface | Serial (Altera FPP / PS modes) | — |
| 最大時脈頻率 | 10 MHz | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Tolerance | 5 V tolerant configuration pins | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Compression Support | Yes (real-time decompression in target FPGA) | — |
| Multi-Device Cascade | Yes (daisy-chain supported) | — |
| 工作溫度 | -40C to +85C (industrial) | -40C to +85C (industrial) |
| 封裝 | 20-pin PLCC (J-Lead, 9x9 mm) | 20-pin PLCC with J-leads (JEDEC MS-018) |
| 安裝類型 | Surface Mount / Socket | — |
| MSL 等級 | 3 (168 hours) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free finish] | [DATA_NEEDED: lead-free status] |
| Compatible FPGA Families | Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur | — |
| 組織 | — | 65,536 x 1-bit (serial interface) |
| 介面 | — | Altera 4-pin serial configuration (DATA, DCLK, nCS, nCONFIG) |
| Target FPGAs | — | APEX II, APEX 20K/20KC/20KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage (VCCIO) | — | 5.0 V or 3.3 V tolerant |
| ISP Programming Interface | — | JTAG (IEEE 1149.1) |
| Cascade Support | — | Yes (multi-device configuration chain) |
| Internal Oscillator | — | Yes (configures without external clock source) |
| Programming Cycles | — | [DATA_NEEDED: minimum endurance cycles] |
| Configuration Clock (DCLK) | — | Up to 33 MHz |