EPC2LS20U vs EPC2LI20N Perbandingan

Perbandingan bersamaan detil EPC2LS20U dari Altera dan EPC2LI20N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2LS20U EPC2LI20N
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete Obsolete
Product Type In-System Programmable Configuration PROM —
Memory Density 1.6 Mbit —
Operating Voltage (VCC) 3.3 V —
Antarmuka Altera serial configuration / JTAG —
Programming Method In-System Programmable (ISP) via JTAG —
Paket 20-PLCC (J-lead, 9x9 mm) —
Lead-Free / RoHS Yes (per "U" suffix) —
Suhu Kerja [DATA_NEEDED: Operating Temperature] [DATA_NEEDED: operating temperature range]
Supported FPGA Families Cyclone I/II, Stratix/II, APEX-II, ACEX-1K, FLEX-10K, FLEX-6000, MAX-7000 —
Configuration Modes PS (Passive Serial), AS, FPP —
JTAG Support Yes (IEEE 1149.1 boundary scan) —
Done Pin Yes (open-drain programmable polarity) —
nSTATUS Pin Yes (open-drain error flag) —
nCONFIG Pin Yes (reset/reconfiguration input) —
DCLK Output Yes (configuration clock to FPGA) —
Level MSL [DATA_NEEDED: MSL Level] —
Compliance RoHS (Pb-free per U suffix) —
Tipe Memori — Non-volatile configuration PROM (Flash)
Ukuran Memori — 1.6 Mbit
Programmable Type — In System Programmable (ISP via JTAG)
Configuration Mode — Serial
Maximum Configuration Frequency — 10 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
Supply Voltage (VCCIO) — 4.5 V to 5.5 V
Paket / Case — 20-PLCC (J-Lead), 9x9 mm
Tipe Mounting — Surface Mount
Packaging — Tube
Supported FPGA Series — ACEX 1K, APEX II, Cyclone, Stratix II
JTAG Interface — IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO)
Configuration Pins — nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE
Status RoHS — [DATA_NEEDED: RoHS status]

Spek dan Sumber

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