EPC4QC1C00N vs EPC4Q100N Perbandingan

Perbandingan bersamaan detil EPC4QC1C00N dari Altera dan EPC4Q100N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC4QC1C00N EPC4Q100N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Device Family Enhanced Configuration Device (EPC4) —
Memory Density 4 Mbit (4,194,304 bits) —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
I/O Voltage Tolerance 3.3 V / 5 V tolerant —
Interface to FPGA Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE —
Configuration Data Width 4-bit multiplexed on single DATA pin —
Paket 100-pin PQFP (QFP-100) 100-pin PQFP
Suhu Kerja -40 C to +85 C (industrial) -40 C to +85 C (industrial)
In-System Programming JTAG (IEEE 1149.1) —
Programming Voltage On-chip generated, no external VPP —
Page Mode Yes, multi-page storage supported —
Target FPGA Families Stratix, Cyclone, APEX, Mercury, ACEX Cyclone, Stratix, APEX, Mercury, ACEX
Configuration Clock (DCLK) [DATA_NEEDED: DCLK max frequency] —
Level MSL 3 (per JEDEC J-STD-020) [DATA_NEEDED: per JEDEC J-STD-020]
Status RoHS [DATA_NEEDED: RoHS compliance status] —
Lead-Free [DATA_NEEDED: lead-free status] —
Tipe Memori — Flash (NOR, Enhanced Configuration Device)
Ukuran Memori — 4 Mbit (512 Kbyte)
Configuration Interface — Serial (FLEX) / Parallel / JTAG ISP
Tegangan Pemuat — 3.3 V
Program/Erase Cycles — [DATA_NEEDED: minimum endurance in cycles]
Tipe Mounting — Surface Mount
JTAG Support — IEEE 1149.1 compliant
In-System Programmable — Yes
Data Width (parallel mode) — 8-bit
Lead-Free / RoHS — [DATA_NEEDED: per lot]
Status — Not Recommended for New Designs (NRND)
Configuration Schemes — Active Serial (AS) / Active Parallel (AP) / Passive Serial (PS)

Spek dan Sumber

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