EPC4QC1C00N vs EPC4Q100N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC4QC1C00N disebabkan oleh Altera dan EPC4Q100N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC4QC1C00N EPC4Q100N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Device Family Enhanced Configuration Device (EPC4) —
Memory Density 4 Mbit (4,194,304 bits) —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
I/O Voltage Tolerance 3.3 V / 5 V tolerant —
Interface to FPGA Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE —
Configuration Data Width 4-bit multiplexed on single DATA pin —
Kemasan 100-pin PQFP (QFP-100) 100-pin PQFP
Suhu Operasi -40 C to +85 C (industrial) -40 C to +85 C (industrial)
In-System Programming JTAG (IEEE 1149.1) —
Programming Voltage On-chip generated, no external VPP —
Page Mode Yes, multi-page storage supported —
Target FPGA Families Stratix, Cyclone, APEX, Mercury, ACEX Cyclone, Stratix, APEX, Mercury, ACEX
Configuration Clock (DCLK) [DATA_NEEDED: DCLK max frequency] —
Aras MSL 3 (per JEDEC J-STD-020) [DATA_NEEDED: per JEDEC J-STD-020]
Status RoHS [DATA_NEEDED: RoHS compliance status] —
Lead-Free [DATA_NEEDED: lead-free status] —
Jenis Ingatan — Flash (NOR, Enhanced Configuration Device)
Saiz Ingatan — 4 Mbit (512 Kbyte)
Configuration Interface — Serial (FLEX) / Parallel / JTAG ISP
Tegangan Pemberi Arus — 3.3 V
Program/Erase Cycles — [DATA_NEEDED: minimum endurance in cycles]
Jenis Pemasangan — Surface Mount
JTAG Support — IEEE 1149.1 compliant
In-System Programmable — Yes
Data Width (parallel mode) — 8-bit
Lead-Free / RoHS — [DATA_NEEDED: per lot]
Status — Not Recommended for New Designs (NRND)
Configuration Schemes — Active Serial (AS) / Active Parallel (AP) / Passive Serial (PS)

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