EPM5130JI vs EPM5130GI Perbandingan
Perbandingan bersamaan detil EPM5130JI dari Altera dan EPM5130GI dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5130JI | EPM5130GI |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable EPLD (CMOS EPROM) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | 8 |
| Frekuensi Bawah Maximum | 33.3 MHz | — |
| Propagation Delay (tPD) | 55 ns | 55 ns |
| External Clock Inputs | 1 (shared input/clock) | — |
| Interconnect | Programmable Interconnect Array (PIA) | Programmable Interconnect Array (PIA) |
| Process Technology | 0.75 micron CMOS EPROM | CMOS |
| Tegangan Pemuat | 5 V (typical) | 5 V |
| Input Logic Standard | TTL-compatible | — |
| Package Type | Ceramic J-Leaded Chip Carrier (JLCC) with UV window | — |
| Suhu Kerja | Commercial (0C to +70C) | -40C to +85C (industrial) |
| Program/Erase Method | UV erasure through quartz window | — |
| Status RoHS | Non-compliant (contains Pb in ceramic package) | [DATA_NEEDED: RoHS status] |
| Lifecycle | Obsolete - EOL by Altera/Intel | — |
| Device Family | — | MAX 5000 |
| Architecture | — | EPLD (Erasable Programmable Logic Device), UV-erasable |
| Dedicated Inputs | — | 19 |
| Total Inputs | — | 68 |
| I/O Pins | — | 48 |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| External Clock Pins | — | 1 |
| Paket | — | Ceramic Pin Grid Array (PGA), windowed |
| Programming Method | — | UV erasure + EPROM programming |