EPM5130JI vs EPM5130GI 比較

詳細並排比較 EPM5130JI 由 Altera 與 EPM5130GI 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

Altera

EPM5130JI - 128-Macrocell MAX 5000 EPLD, 33.3 MHz | Altera

EPM5130JI Obsolete

Altera

EPM5130GI Obsolete

參數	EPM5130JI	EPM5130GI
品牌	Altera	Altera
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	Obsolete	Obsolete
Family	MAX 5000	—
Device Type	UV-Erasable EPLD (CMOS EPROM)	—
Macrocells	128	128
Logic Array Blocks (LABs)	8	8
最大時脈頻率	33.3 MHz	—
Propagation Delay (tPD)	55 ns	55 ns
External Clock Inputs	1 (shared input/clock)	—
Interconnect	Programmable Interconnect Array (PIA)	Programmable Interconnect Array (PIA)
Process Technology	0.75 micron CMOS EPROM	CMOS
供應電壓	5 V (typical)	5 V
Input Logic Standard	TTL-compatible	—
Package Type	Ceramic J-Leaded Chip Carrier (JLCC) with UV window	—
工作溫度	Commercial (0C to +70C)	-40C to +85C (industrial)
Program/Erase Method	UV erasure through quartz window	—
RoHS 狀態	Non-compliant (contains Pb in ceramic package)	[DATA_NEEDED: RoHS status]
Lifecycle	Obsolete - EOL by Altera/Intel	—
Device Family	—	MAX 5000
Architecture	—	EPLD (Erasable Programmable Logic Device), UV-erasable
Dedicated Inputs	—	19
Total Inputs	—	68
I/O Pins	—	48
Maximum Clock Frequency (fMAX)	—	33.3 MHz
External Clock Pins	—	1
封裝	—	Ceramic Pin Grid Array (PGA), windowed
Programming Method	—	UV erasure + EPROM programming