EPM5192LC84 vs EPM5192LC84-2 Perbandingan
Perbandingan bersamaan detil EPM5192LC84 dari Altera dan EPM5192LC84-2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5192LC84 | EPM5192LC84-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Paket | LCC-84 (PQCC84, MS-018) | 84-pin PLCC (LC) |
| Jumlah Pin | 84 | — |
| Tipe Mounting | Surface Mount (Socket-compatible) | Surface Mount |
| Suhu Kerja | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| Tegangan Pemuat | [DATA_NEEDED: VCC range] | 5 V (TTL-compatible I/O) |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| Status RoHS | unknown | Non-compliant (SnPb lead finish typical for this vintage) |
| Level MSL | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | EPLD (UV-Erasable / OTP Complex PLD) |
| Macrocells | — | 192 |
| Speed Grade | — | -2 |
| Technology | — | CMOS, UV-erasable / OTP |
| Logic Elements | — | AND-OR array with macrocell flip-flops |
| Programming Method | — | Altera legacy programmer (JEDEC bitstream) |
| Status Lingkungan Hidup | — | Obsolete (last Altera MAX 5000 production) |
| JTAG Support | — | Vendor-specific programming interface (pre-IEEE 1532) |
| I/O Standard | — | TTL, 5V CMOS-compatible |