EPM7096LC68-15 vs EPM7096QC100-10 Perbandingan
Perbandingan bersamaan detil EPM7096LC68-15 dari Altera dan EPM7096QC100-10 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM7096QC100-10 - 96-Macrocell MAX 7000 CPLD, 10ns, PQFP-100 | Altera
EPM7096QC100-10 ObsoletePerbandingan Spesifikasi
| Parameter Umum | EPM7096LC68-15 | EPM7096QC100-10 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O Pins | 52 | 76 |
| Propagation Delay (tPD) | 15 ns | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | 4.75 V to 5.25 V (5 V nominal) | — |
| Programmable Technology | EEPROM (second-generation MAX architecture) | — |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | — |
| Logic Gates (typical) | 1800 gates | — |
| Memory Bits | Non-volatile configuration, 100 erase/program cycles per macrocell | — |
| Paket | PLCC-68 (LC68) | 100-pin PQFP (R-PQFP-G100, 20×14 mm, 0.65 mm pitch) |
| Tipe Mounting | Surface Mount (PLCC socket compatible) | Surface Mount |
| Suhu Kerja | 0C to +70C (commercial) | 0 °C to +70 °C (commercial) |
| Lead-Free / RoHS | Compliant per Altera product page | — |
| Programming Tool Support | Altera MAX+PLUS II, Quartus II; ByteBlaster / ByteBlasterMV | — |
| Logic Array Blocks | — | 4 |
| Maximum Operating Frequency | — | 100 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Technology | — | EEPROM-based CMOS |
| Programming Interface | — | ByteBlaster / parallel (JTAG ISP on MAX 7000S variants) |
| Boundary Scan | — | IEEE Std. 1149.1 (JTAG) on MAX 7000S |
| PCI Compliance | — | Yes (PCI SIG Local Bus Specification Rev. 2.2 at -10 speed grade) |
| Status RoHS | — | [DATA_NEEDED: RoHS compliance status] |