EPM7256AEQC208-5N vs EPM7256AETC100-10N Perbandingan
Perbandingan bersamaan detil EPM7256AEQC208-5N dari Altera dan EPM7256AETC100-10N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM7256AETC100-10N - 256-Macro MAX 7000A CPLD, 10ns, TQFP-100 | Intel (Altera)
EPM7256AETC100-10N ObsoletePerbandingan Spesifikasi
| Parameter Umum | EPM7256AEQC208-5N | EPM7256AETC100-10N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 7000A | MAX 7000A |
| Logic Family / Base Technology | CMOS, EEPROM-based | — |
| Usable Gates | 5,000 | 5,000 |
| Macrocells | 256 | — |
| User I/Os | 164 | — |
| Dedicated Inputs | 16 | 4 (global clock / clear / OE) |
| Jumlah Pin | 208 | — |
| Paket | 208-pin PQFP (Plastic Quad Flat Pack) | 100-pin TQFP |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Maximum Internal Frequency | 172.4 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 5.5 ns | — |
| Speed Grade | -5 | — |
| Suhu Kerja | 0 C to +70 C (Commercial) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) / ISP | — |
| Tipe Mounting | Surface Mount | Surface Mount |
| Status RoHS | unknown | [DATA_NEEDED: not confirmed in provided data] |
| Level MSL | [DATA_NEEDED: MSL Level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 256 |
| Maximum User I/Os | — | 84 |
| Logic Elements / LABs | — | 16 Logic Array Blocks |
| Pin-to-Pin Logic Delay | — | 10 ns |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5.0 V |
| Programmability | — | EEPROM, in-system via JTAG (IEEE 1149.1) |
| Rentang Suhu Kerja | — | 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet] |
| Process Technology | — | 0.30 µm EEPROM |
| Lead-Free / Pb-Free | — | [DATA_NEEDED: not confirmed in provided data] |