EPM9320ARC208-10N vs EPM9320RI208-10N Perbandingan
Perbandingan bersamaan detil EPM9320ARC208-10N dari Altera dan EPM9320RI208-10N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM9320ARC208-10N | EPM9320RI208-10N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Aktif |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | Complex Programmable Logic Device (CPLD) |
| Macro Cells | 320 | 320 |
| Logic Gates | 6,000 gates | — |
| Logic Array Blocks (LABs) | 16 | 20 |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Frequency | 144.9 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 168 | 160 |
| Dedicated Input Pins | 12 | — |
| Paket | 208-pin RQFP (BFQFP with exposed pad) | 208-pin RQFP (PowerQuad II) |
| Tipe Mounting | Surface Mount | Surface Mount |
| Suhu Kerja | 0C to +70C (Commercial) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile) |
| Status RoHS | Compliant (lead-free 'N' suffix) | Compliant (N suffix = lead-free) |
| Usable Gates | — | 6,000 |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| Maximum System Clock Frequency | — | 100 MHz |
| Tegangan Pemuat | — | 5 V |
| I/O Voltage | — | 5 V |
| In-System Programmability | — | Yes (JTAG/ISP) |
| Rentang Suhu Kerja | — | -40C to +85C (industrial) |
| Lead Finish | — | Lead-free (matte tin) |
| Level MSL | — | [DATA_NEEDED: MSL level] |