EPM9320GC280-20 vs EPM9320RC208-20 Perbandingan

Perbandingan bersamaan detil EPM9320GC280-20 dari Altera dan EPM9320RC208-20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9320GC280-20 EPM9320RC208-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 320 320
Usable Gates 6000 (approx.) 6,000
Logic Array Blocks (LABs) 20 (16 macrocells each, typical for MAX 9000) 20
Maximum Operating Frequency 100 MHz (internal counter) —
Propagation Delay (tpd) 23 ns (approx., -20 speed grade) —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Technology CMOS EEPROM —
In-System Programmability Yes (5.0-V ISP via JTAG) —
JTAG Support IEEE Std. 1149.1 compliant —
Paket 280-pin Ceramic Pin Grid Array (CPGA) 208-RQFP, exposed pad (208-BFQFP)
Suhu Kerja [DATA_NEEDED: operating temperature grade] 0 °C to 70 °C (commercial)
Tipe Mounting Through-Hole (PGA socket) Surface Mount
Status RoHS unknown —
Configuration Memory EEPROM (non-volatile, instant-on) —
Maximum I/O Pins — 132
Propagation Delay (tPD max) — 20 ns
Supply Voltage (VCCINT) — 4.75 V to 5.25 V
Programming Technology — EEPROM, in-system programmable (ISP)
Boundary-Scan Interface — IEEE Std. 1149.1 (JTAG)
Architecture — Multiple Array Matrix (MAX), 3rd generation
Process Technology — CMOS, 5.0 V EEPROM
Reprogrammability — Yes, unlimited ISP cycles

Spek dan Sumber

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