IR2104SPBF vs IRS2101STRPBF Perbandingan
Perbandingan bersamaan detil IR2104SPBF dari Infineon dan IRS2101STRPBF dari Infineon. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | IR2104SPBF | IRS2101STRPBF |
|---|---|---|
| Merek | Infineon | Infineon |
| Kategori | Power MOSFET Drivers | Power MOSFET Drivers |
| Status Lingkungan Hidup | Aktif | Aktif |
| Fungsi | Half-bridge gate driver | — |
| Number of Drivers | 2 (high-side + low-side) | 2 |
| Configuration | High and Low Side | — |
| Input Type | Logic (non-inverting) | — |
| Maximum Offset / Bootstrap Supply Voltage | 600 V | — |
| Gate Drive Supply Range (VCC) | 10 V to 20 V | — |
| Output Source Current | 130 mA typical | — |
| Output Sink Current | 270 mA typical | — |
| Propagation Delay | 680 ns typical | — |
| Waktu naik | 160 ns typical | — |
| Waktu Menurun | 60 ns typical | — |
| Logic Input Compatibility | 3.3 V, 5 V, 15 V CMOS/LSTTL | 3.3 V / 5 V / 15 V |
| Undervoltage Lockout | Yes (VCC UVLO) | Yes (VCC and VBS) |
| Deadtime | Internally set | — |
| Cross-Conduction Prevention | Yes | — |
| Rentang Suhu Kerja | -40 C to +125 C | — |
| Paket | 8-pin SOIC | 8-SOIC (SOIC-8) |
| Status RoHS | Compliant (PBF suffix indicates lead-free) | Compliant (PBF suffix) |
| Driver Type | — | High-Side, Low-Side (Half-Bridge) |
| Jumlah Output | — | 2-OUT |
| Konfigurasi Output | — | Non-Inverting |
| Maximum Offset Voltage | — | 600 V |
| Gate Drive Supply (VCC) | — | 10 V to 20 V |
| Bootstrap Supply (VBS) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.6 A |
| VS Transient Range | — | -5 V to +600 V (logic operational) |
| Propagation Delay Matching | — | Matched both channels |
| dV/dt Immunity | — | Yes (latch-immune CMOS) |
| Suhu Kerja | — | -40C to +125C |
| Tipe Mounting | — | Surface Mount |
| Packaging | — | Tape & Reel (TRPBF) |
| Technology | — | HVIC + latch-immune CMOS |