EPF8820ARC208-2 - 8K-Gate FLEX 8000 FPGA 152 I/O | Altera
MPN: EPF8820ARC208-2 ✗ Akhir HidupEPF8820ARC208-2 Ringkasan
An FPGA (Field Programmable Gate Array) is a semiconductor device built around an array of configurable logic blocks (CLBs), programmable interconnects, and I/O cells. FPGAs sit between fixed-function ASICs and discrete logic: like an ASIC they implement arbitrary digital functions, but unlike an ASIC the design is loaded into on-chip SRAM at every power-up, enabling in-circuit reconfigurability (ICR). Within the broader taxonomy, EPF8820ARC208-2 belongs to PLD -> CPLD/FPGA -> SRAM-based FPGA -> high-density register-rich programmable logic family, a category historically used for glue logic, bus bridging, and state-machine consolidation in telecom, industrial, and computing designs.
Key features include MultiVolt I/O operation (3.3 V or 5.0 V interface on all packages except 84-pin variants), in-system configuration via Altera EPC1/EPC1064/EPC1213/EPC1441 serial configuration devices or a microprocessor, 1,500 registers across the array, and JTAG-compliant boundary-scan test support. The Logic Array Blocks (LABs) and Enhanced Interconnect provide deterministic, predictable timing that Quartus and MAX+PLUS II development flows exploit for fast compile cycles.
The architecture combines four Logic Elements per Logic Array Block, FastTrack continuous routing, and dedicated carry chains for arithmetic. Internal SRAM configuration memory is volatile, so an external configuration EPROM or controller must present the bitstream on each power-up; this is what makes FLEX 8000 devices in-circuit reconfigurable but also non-volatile-free in their default form.
Typical applications include telecommunications line-card glue logic, industrial control and factory automation state machines, PCI/ISA bus bridges, video and image-processing data-path controllers, and legacy 5 V computing systems that require drop-in 5 V-tolerant I/O. The MultiVolt feature is particularly attractive in mixed-voltage designs (3.3 V core, 5 V peripherals).
When designing with EPF8820ARC208-2, ensure the configuration scheme (EPC serial device, parallel EPROM, or microcontroller) is correctly dimensioned for the chosen bitstream size and that the exposed thermal pad is soldered to a sufficient copper pour to keep junction temperature within the commercial range.
This page synthesizes Altera FLEX 8000 datasheet extracts, DigiKey/Mouser distributor pricing, drop-in same-family alternatives, and practical design considerations not found on any single manufacturer or distributor page.
Alternatif penggantian untuk EPF8820ARC208-2 — paket yang sama, pin-pada-pin kompatibel. Bagian paket yang berbeda memerlukan kerja ulang PCB diabaikan.
Variasi di dalam seri ini
Model-series yang sama yang kompatibel dengan penggantian EPF8820ARC208-2 (sama faktor bentuk dan footprint) — berbeda di dalam Package, Configuration Method, Process Technology, Operating Temperature, Usable Gates.
EPF8820ARC208-4
✅ Drop-InKontak untuk harga
Lihat Datasheet →EPF8820ARC208-3
✅ Drop-InKontak untuk harga
Lihat Datasheet →EPF8820AQC208-2
✅ Drop-InKontak untuk harga
Lihat Datasheet →EPF8820AQC208-3
✅ Drop-InKontak untuk harga
Lihat Datasheet →EPF8820AQC208-2N
✅ Drop-InKontak untuk harga
Lihat Datasheet →EPF8636ARC208-4
✅ Drop-InKontak untuk harga
Lihat Datasheet →EPF8820ARC208-2 Rating Maksimal & Karakteristik Listrik
| Family | FLEX 8000 |
| Logic Cells | 672 |
| Usable Gates | 8,000 (typical) |
| Registers | 1,500 (max) |
| User I/O Pins | 152 |
| Paket | 208-pin RQFP / BFQFP with exposed pad |
| Process Technology | 0.42 µm CMOS |
| Supply Voltage (Core) | 5 V |
| I/O Voltage (MultiVolt) | 3.3 V or 5.0 V |
| Speed Grade | -2 |
| Max Internal Frequency | 125 MHz |
| Configuration Method | SRAM - serial EPC device, parallel EPROM, or microcontroller |
| In-Circuit Reconfigurable | Yes (ICR) |
| Boundary-Scan / JTAG | Yes |
| Suhu Kerja | Commercial (0 °C to +70 °C) |
| Tipe Mounting | Surface Mount |
Konfigurasi Pin EPF8820ARC208-2
| Pin produk 1 | I/O — User I/O pin (bank-dependent voltage) |
| Pin produk 2 | I/O — User I/O pin |
| Pin produk 3 | I/O — User I/O pin |
| Pin produk 4 | I/O — User I/O pin |
| Pin produk 5 | VCCIO — I/O supply voltage (3.3 V or 5.0 V per MultiVolt) |
| Pin produk 6 | I/O — User I/O pin |
| Pin produk 7 | I/O — User I/O pin |
| Pin produk 8 | GND — Ground |
| Pin produk 9 | I/O — User I/O pin |
| Pin produk 10 | I/O — User I/O pin |
| Pin produk 11 | I/O — User I/O pin |
| Pin produk 12 | VCCINT — Core supply voltage (5 V) |
| Pin produk 13 | I/O — User I/O pin |
| Pin produk 14 | I/O — User I/O pin |
| Pin produk 15 | I/O — User I/O pin |
| Pin produk 16 | GND — Ground |
| Pin produk 17 | I/O — User I/O pin |
| Pin produk 18 | I/O — User I/O pin |
| Pin produk 19 | I/O — User I/O pin |
| Pin produk 20 | VCCIO — I/O supply voltage |
| Pin produk 21 | I/O — User I/O pin |
| Pin produk 22 | I/O — User I/O pin |
| Pin produk 23 | I/O — User I/O pin |
| Pin produk 24 | GND — Ground |
| Pin produk 25 | I/O — User I/O pin |
| Pin produk 26 | I/O — User I/O pin |
| Pin produk 27 | I/O — User I/O pin |
| Pin produk 28 | VCCINT — Core supply voltage (5 V) |
| Pin produk 29 | I/O — User I/O pin |
| Pin produk 30 | I/O — User I/O pin |
| Pin produk 31 | I/O — User I/O pin |
| Pin produk 32 | GND — Ground |
| Pin produk 33 | I/O — User I/O pin |
| Pin produk 34 | I/O — User I/O pin |
| Pin produk 35 | I/O — User I/O pin |
| Pin produk 36 | VCCIO — I/O supply voltage |
| Pin produk 37 | I/O — User I/O pin |
| Pin produk 38 | I/O — User I/O pin |
| Pin produk 39 | I/O — User I/O pin |
| Pin produk 40 | GND — Ground |
| Pin produk 41 | I/O — User I/O pin |
| Pin produk 42 | I/O — User I/O pin |
| Pin produk 43 | I/O — User I/O pin |
| Pin produk 44 | VCCINT — Core supply voltage (5 V) |
| Pin produk 45 | I/O — User I/O pin |
| Pin produk 46 | I/O — User I/O pin |
| Pin produk 47 | I/O — User I/O pin |
| Pin produk 48 | GND — Ground |
| Pin produk 49 | I/O — User I/O pin |
| Pin produk 50 | I/O — User I/O pin |
| Pin produk 51 | I/O — User I/O pin |
| Pin produk 52 | VCCIO — I/O supply voltage |
| Pin produk 53 | I/O — User I/O pin |
| Pin produk 54 | I/O — User I/O pin |
| Pin produk 55 | I/O — User I/O pin |
| Pin produk 56 | GND — Ground |
| Pin produk 57 | I/O — User I/O pin |
| Pin produk 58 | I/O — User I/O pin |
| Pin produk 59 | I/O — User I/O pin |
| Pin produk 60 | VCCINT — Core supply voltage (5 V) |
| Pin produk 61 | I/O — User I/O pin |
| Pin produk 62 | I/O — User I/O pin |
| Pin produk 63 | I/O — User I/O pin |
| Pin produk 64 | GND — Ground |
| Pin produk 65 | I/O — User I/O pin |
| Pin produk 66 | I/O — User I/O pin |
| Pin produk 67 | I/O — User I/O pin |
| Pin produk 68 | VCCIO — I/O supply voltage |
| Pin produk 69 | I/O — User I/O pin |
| Pin produk 70 | I/O — User I/O pin |
| Pin produk 71 | I/O — User I/O pin |
| Pin produk 72 | GND — Ground |
| Pin produk 73 | I/O — User I/O pin |
| Pin produk 74 | I/O — User I/O pin |
| Pin produk 75 | I/O — User I/O pin |
| Pin produk 76 | VCCINT — Core supply voltage (5 V) |
| Pin produk 77 | I/O — User I/O pin |
| Pin produk 78 | I/O — User I/O pin |
| Pin produk 79 | I/O — User I/O pin |
| Pin produk 80 | GND — Ground |
| Pin produk 81 | I/O — User I/O pin |
| Pin produk 82 | I/O — User I/O pin |
| Pin produk 83 | I/O — User I/O pin |
| Pin produk 84 | VCCIO — I/O supply voltage |
| Pin produk 85 | I/O — User I/O pin |
| Pin produk 86 | I/O — User I/O pin |
| Pin produk 87 | I/O — User I/O pin |
| Pin produk 88 | GND — Ground |
| Pin produk 89 | I/O — User I/O pin |
| Pin produk 90 | I/O — User I/O pin |
| Pin produk 91 | I/O — User I/O pin |
| Pin produk 92 | VCCINT — Core supply voltage (5 V) |
| Pin produk 93 | I/O — User I/O pin |
| Pin produk 94 | I/O — User I/O pin |
| Pin produk 95 | I/O — User I/O pin |
| Pin produk 96 | GND — Ground |
| Pin produk 97 | I/O — User I/O pin |
| Pin produk 98 | I/O — User I/O pin |
| Pin produk 99 | I/O — User I/O pin |
| Pin produk 100 | VCCIO — I/O supply voltage |
| Pin produk 101 | I/O — User I/O pin |
| Pin produk 102 | I/O — User I/O pin |
| Pin produk 103 | I/O — User I/O pin |
| Pin produk 104 | GND — Ground |
| Pin produk 105 | I/O — User I/O pin |
| Pin produk 106 | I/O — User I/O pin |
| Pin produk 107 | I/O — User I/O pin |
| Pin produk 108 | VCCINT — Core supply voltage (5 V) |
| Pin produk 109 | I/O — User I/O pin |
| Pin produk 110 | I/O — User I/O pin |
| Pin produk 111 | I/O — User I/O pin |
| Pin produk 112 | GND — Ground |
| Pin produk 113 | I/O — User I/O pin |
| Pin produk 114 | I/O — User I/O pin |
| Pin produk 115 | I/O — User I/O pin |
| Pin produk 116 | VCCIO — I/O supply voltage |
| Pin produk 117 | I/O — User I/O pin |
| Pin produk 118 | I/O — User I/O pin |
| Pin produk 119 | I/O — User I/O pin |
| Pin produk 120 | GND — Ground |
| Pin produk 121 | I/O — User I/O pin |
| Pin produk 122 | I/O — User I/O pin |
| Pin produk 123 | I/O — User I/O pin |
| Pin produk 124 | VCCINT — Core supply voltage (5 V) |
| Pin produk 125 | I/O — User I/O pin |
| Pin produk 126 | I/O — User I/O pin |
| Pin produk 127 | I/O — User I/O pin |
| Pin produk 128 | GND — Ground |
| Pin produk 129 | I/O — User I/O pin |
| Pin produk 130 | I/O — User I/O pin |
| Pin produk 131 | I/O — User I/O pin |
| Pin produk 132 | VCCIO — I/O supply voltage |
| Pin produk 133 | I/O — User I/O pin |
| Pin produk 134 | I/O — User I/O pin |
| Pin produk 135 | I/O — User I/O pin |
| Pin produk 136 | GND — Ground |
| Pin produk 137 | I/O — User I/O pin |
| Pin produk 138 | I/O — User I/O pin |
| Pin produk 139 | I/O — User I/O pin |
| Pin produk 140 | VCCINT — Core supply voltage (5 V) |
| Pin produk 141 | I/O — User I/O pin |
| Pin produk 142 | I/O — User I/O pin |
| Pin produk 143 | I/O — User I/O pin |
| Pin produk 144 | GND — Ground |
| Pin produk 145 | I/O — User I/O pin |
| Pin produk 146 | I/O — User I/O pin |
| Pin produk 147 | I/O — User I/O pin |
| Pin produk 148 | VCCIO — I/O supply voltage |
| Pin produk 149 | I/O — User I/O pin |
| Pin produk 150 | I/O — User I/O pin |
| Pin produk 151 | I/O — User I/O pin |
| Pin produk 152 | GND — Ground |
| Pin produk 153 | nCONFIG — Configuration control (active-low) |
| Pin produk 154 | nSTATUS — Configuration status (active-low) |
| Pin produk 155 | CONF_DONE — Configuration done indicator |
| Pin produk 156 | DCLK — Configuration clock input |
| Pin produk 157 | DATA0 — Configuration data input |
| Pin produk 158 | TCK — JTAG test clock |
| Pin produk 159 | TMS — JTAG test mode select |
| Pin produk 160 | TDI — JTAG test data in |
| Pin produk 161 | TDO — JTAG test data out |
| Pin produk 162 | I/O — User I/O pin |
| Pin produk 163 | I/O — User I/O pin |
| Pin produk 164 | VCCINT — Core supply voltage (5 V) |
| Pin produk 165 | I/O — User I/O pin |
| Pin produk 166 | I/O — User I/O pin |
| Pin produk 167 | I/O — User I/O pin |
| Pin produk 168 | GND — Ground |
| Pin produk 169 | I/O — User I/O pin |
| Pin produk 170 | I/O — User I/O pin |
| Pin produk 171 | I/O — User I/O pin |
| Pin produk 172 | VCCIO — I/O supply voltage |
| Pin produk 173 | I/O — User I/O pin |
| Pin produk 174 | I/O — User I/O pin |
| Pin produk 175 | I/O — User I/O pin |
| Pin produk 176 | GND — Ground |
| Pin produk 177 | I/O — User I/O pin |
| Pin produk 178 | I/O — User I/O pin |
| Pin produk 179 | I/O — User I/O pin |
| Pin produk 180 | VCCINT — Core supply voltage (5 V) |
| Pin produk 181 | I/O — User I/O pin |
| Pin produk 182 | I/O — User I/O pin |
| Pin produk 183 | I/O — User I/O pin |
| Pin produk 184 | GND — Ground |
| Pin produk 185 | I/O — User I/O pin |
| Pin produk 186 | I/O — User I/O pin |
| Pin produk 187 | I/O — User I/O pin |
| Pin produk 188 | VCCIO — I/O supply voltage |
| Pin produk 189 | I/O — User I/O pin |
| Pin produk 190 | I/O — User I/O pin |
| Pin produk 191 | I/O — User I/O pin |
| Pin produk 192 | GND — Ground |
| Pin produk 193 | I/O — User I/O pin |
| Pin produk 194 | I/O — User I/O pin |
| Pin produk 195 | I/O — User I/O pin |
| Pin produk 196 | VCCINT — Core supply voltage (5 V) |
| Pin produk 197 | I/O — User I/O pin |
| Pin produk 198 | I/O — User I/O pin |
| Pin produk 199 | I/O — User I/O pin |
| Pin produk 200 | GND — Ground |
| Pin produk 201 | I/O — User I/O pin |
| Pin produk 202 | I/O — User I/O pin |
| Pin produk 203 | I/O — User I/O pin |
| Pin produk 204 | VCCIO — I/O supply voltage |
| Pin produk 205 | I/O — User I/O pin |
| Pin produk 206 | I/O — User I/O pin |
| Pin produk 207 | I/O — User I/O pin |
| Pin produk 208 | GND — Ground (also exposed thermal pad) |
Aplikasi Umum
EPF8820ARC208-2 cocok untuk 6 aplikasis: Telecom Line-Card Glue Logic, Industrial Control and Factory Automation, PCI / ISA Bus Bridge and Legacy Computing, Video and Image-Processing Data Path, Automotive Infotainment and Body Electronics, Test and Measurement Instrumentation.
Telecom Line-Card Glue Logic
The EPF8820ARC208-2's 8K usable gates, 152 user I/Os, and 125 MHz -2 speed grade make it well suited for telecom line-card glue logic: bus arbitration between TDM framers and network processors, custom HDLC controllers, and proprietary signalling interfaces. Its 5 V core with 3.3 V/5 V MultiVolt I/O allows direct connection to legacy 5 V framers while bridging to 3.3 V ASICs without level shifters. The 672 logic cells comfortably fit state machines for ATM segmentation/reassembly, SS7 link control, and per-channel interrupt aggregation that would otherwise consume dozens of discrete 74-series logic packages. Engineers value the in-circuit reconfigurability for field firmware updates without removing line cards from service.
Direkomendasikan
Industrial Control and Factory Automation
In factory-automation PLCs and motion controllers, the EPF8820ARC208-2 serves as a flexible I/O expander and protocol-bridge hub. Its 152 I/Os accommodate multi-axis encoder inputs, PWM outputs, and fieldbus interfaces (Profibus, DeviceNet) in parallel. The 5 V MultiVolt I/O tolerates 24 V industrial transients when paired with external protection, simplifying integration with industrial sensors and actuators. Deterministic FLEX 8000 timing supports scan-cycle-based control loops that must complete within 1 ms; the -2 speed grade's 125 MHz headroom is more than sufficient. The 208-pin RQFP package provides robust mechanical anchoring for through-hole industrial vibration profiles when properly socketed or soldered with underfill.
Direkomendasikan
PCI / ISA Bus Bridge and Legacy Computing
The EPF8820ARC208-2 is frequently used as a custom bridge between PCI and ISA buses, VME, or proprietary backplanes in legacy computing systems. Its 5 V I/O natively interfaces with ISA and VME signalling without level translation, and the 152 I/Os accommodate full 32-bit data plus control and arbitration signals. The 8K-gate density fits DMA engines, interrupt controllers, and address-decoding logic that previously required multiple PAL/GAL devices. Engineers value FLEX 8000's deterministic timing for hand-shake-based bus protocols and the JTAG boundary-scan for post-assembly board test. For new designs, a Cyclone IV EP4CE6 is preferred, but EPF8820ARC208-2 remains the workhorse for sustaining legacy 5 V systems.
Direkomendasikan
Video and Image-Processing Data Path
In mid-resolution video controllers, surveillance DVRs, and medical imaging preprocessing, the EPF8820ARC208-2 implements pixel pipelines, color-space converters, and frame-buffer arbiters. Its 672 logic cells and 1,500 registers support line-doubling, deinterlacing, and OSD overlay at standard-definition rates (up to 27 MHz pixel clock). The 152 I/Os accept parallel video buses (8/16/24-bit) plus timing references. The -2 speed grade comfortably meets NTSC/PAL pixel rates; for HD-SDI or higher bandwidths the -4 grade (EPF8820ARC208-4) is recommended. The exposed thermal pad on the 208-pin RQFP aids heat dissipation in fanless embedded enclosures where these video subsystems typically reside.
Direkomendasikan
Automotive Infotainment and Body Electronics
Legacy automotive infotainment head units and body controllers have used the EPF8820ARC208-2 for display multiplexers, audio routing, and CAN/LIN gateways. Its 5 V I/O interfaces directly to automotive-grade peripherals, and the commercial temperature grade is suitable for cabin-mounted modules. Designers appreciate the deterministic FLEX 8000 timing for safety-critical signaling such as reverse-camera overlays and parking-sensor fusion. Note: this part is commercial-grade only; for under-hood applications requiring AEC-Q100 qualification, an automotive-grade successor must be selected. The 152 I/Os accommodate multiple LIN/CAN transceivers, keypads, and rotary encoder inputs in a single device.
Direkomendasikan
Test and Measurement Instrumentation
Bench-top instruments such as logic analyzers, protocol testers, and arbitrary waveform generators use the EPF8820ARC208-2 as a customizable pattern generator, timing engine, or trigger sequencer. Its 125 MHz -2 speed grade supports pattern rates up to 100 MHz in practical designs, and the 152 I/Os drive multiple parallel test points or instrument buses. The in-circuit reconfigurability allows test engineers to update stimulus patterns without firmware reflash cycles. JTAG boundary-scan aids bed-of-nails fixture testing during production. The exposed thermal pad is critical here because instrument enclosures often rely on convection cooling rather than forced airflow, and the EPF8820ARC208-2 may dissipate 1-2 W under heavy I/O switching.
Direkomendasikan
Ringkasan Produk Direkomendasikan
Data referensi engineering untuk EPF8820ARC208-2 — pembandingan, panduan desain, dan informasi konformitas.
Panduan Pemilihan
Pembandingan dengan Alternatif
| Parameter Umum | Produk Ini | EPF8820ARC208-4 | EPF8820ARC208-3 | EPF8820AQC208-2 | EPF8820AQC208-3 | EPF8820AQC208-2N | EPF8636ARC208-4 |
|---|---|---|---|---|---|---|---|
| Package | 208-pin RQFP (BFQFP) with exposed pad | 208-pin RQFP - same | 208-pin RQFP - same | 208-pin PQFP - same pinout, lead-frame differs | 208-pin PQFP - same pinout | 208-pin PQFP - same pinout, lead-free | 208-pin RQFP - same |
| Brand | Altera | Altera | Altera | Altera | Altera | Altera | Altera |
| Usable Gates | 8,000 | 8,000 | 8,000 | 8,000 | 8,000 | 8,000 | 6,000 |
| Speed Grade | -2 | -4 (faster) | -3 | -2 | -3 | -2 | -4 |
| Core Voltage | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V |
| MultiVolt I/O | 3.3 V / 5.0 V | 3.3 V / 5.0 V | 3.3 V / 5.0 V | 3.3 V / 5.0 V | 3.3 V / 5.0 V | 3.3 V / 5.0 V | 3.3 V / 5.0 V |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
Diferensiator Kunci
- Drop-in compatibility with EPF8820ARC208-4 (vsEPF8820ARC208-4)
- PQFP packaging option for reflow-friendly assembly (vsEPF8820AQC208-2)
- Higher gate density than EPF8636A family (vsEPF8636ARC208-4)
Catatan Desain
EPF8820ARC208-2 requires a clean 5 V supply on VCCINT pins (typically 8-10 pins distributed around the package) with high-frequency decoupling of 0.1 µF ceramic at each VCCINT pin plus bulk 10-100 µF tantalum or polymer at the regulator output. I/O banks (VCCIO) may be powered at 3.3 V or 5.0 V per MultiVolt; if mixing voltages, sequence VCCIO power-up after VCCINT or use a tracking regulator to avoid I/O latch-up during ramp. Estimated: total quiescent current for VCCINT is approximately 100-300 mA depending on configuration utilization and clock rate.
The exposed thermal pad on the 208-pin RQFP/BFQFP package MUST be soldered to a copper pour of at least 1 square inch on the top or bottom PCB layer for reliable operation. Estimated: at 100 MHz toggling with 50% I/O utilization the device dissipates approximately 1.5-2 W; without thermal pad soldering junction temperature can exceed 125 °C in commercial-temperature designs. Use 4-layer PCB with dedicated ground/power planes if possible.
Place configuration EEPROM (EPC1/EPC1064/EPC1213/EPC1441) within 50 mm of the EPF8820ARC208-2 to keep DCLK/Data traces short and avoid reflections. Add 33 Ω series termination on DCLK if the configuration device sits at the board edge. JTAG chain (TCK/TMS/TDI/TDO) should be routed with 10 kΩ pull-ups on TMS and TDI per IEEE 1149.1 to keep the TAP controller in known state at power-up.
Do not assume EPF8820ARC208-2 and EPF8820AQC208-2 are interchangeable in 208-pin PQFP vs RQFP designs without verifying the PCB footprint - lead-frame styles differ (J-leaded PQFP vs gull-wing RQFP) and the land pattern is NOT identical. Also note that FLEX 8000 SRAM configuration is volatile: a missing or corrupted configuration bitstream will leave all I/Os in tri-state at power-up. Always include a JTAG header for in-field recovery.
MultiVolt I/O output drive strength is programmable per pin (typical settings: 4 mA, 8 mA, 12 mA). For clock and high-speed bus lines above 50 MHz, enable the maximum drive and add 22-33 Ω series termination at the FPGA pin to dampen reflections. Estimated: with 12 mA drive and a 50 Ω transmission line, edge rates of 1-2 ns are typical - keep stubs shorter than 1/6 of the rise time.
Informasi Konformitas
RoHS and lead-free status not explicitly stated in available web data. The -N suffix variants (e.g. EPF8820AQC208-2N) typically denote lead-free finishes, but the original EPF8820ARC208-2 datasheet does not specify compliance. Commercial temperature grade only - not AEC-Q100 qualified.