XC6SLX9-2TQG144C - Spartan-6 LX FPGA, 9152 Cells, 102 I/O | AMD
MPN: XC6SLX9-2TQG144C ✓ AktifXC6SLX9-2TQG144C Ringkasan
A field-programmable gate array (FPGA) is a semiconductor device built around an array of configurable logic blocks (CLBs), programmable interconnects, and dedicated I/O cells that engineers can reprogram after PCB assembly to implement arbitrary digital logic, state machines, glue logic, soft processors, or high-speed serial interfaces. Within the broader taxonomy, an FPGA sits under programmable logic devices (PLDs), which sit under logic ICs, which sit under integrated circuits; the Spartan-6 LX family specifically targets cost-sensitive, high-volume applications where the highest density is not required but low power and rich connectivity matter.
Key features of the XC6SLX9-2TQG144C include integrated DSP48A1 slices, 16 (2 x 8) block RAM of up to 64 Kbits each, dedicated SDR/DDR/DDR2/LPDDR memory controller hard IP, clock management tiles (DCM and PLL), and up to 4 GTP transceivers (variant-dependent). The TQFP-144 plastic thin quad flat pack offers 0.5 mm pitch and 20 x 20 mm body, enabling low-cost two-layer PCB assembly.
Internally the device uses 1.14 V to 1.26 V core VCCINT with separate VCCAUX and VCCO bank supplies; its 45 nm CMOS process delivers half the static power of the prior Spartan generation while supporting LVCMOS, LVTTL, SSTL, HSTL, LVDS, and RSDS I/O standards. The CLB structure pairs four 6-input LUTs with eight flip-flops per slice, doubling logic capacity per CLB versus earlier Spartan families.
Typical applications include embedded system glue logic, industrial control and bridging protocols, video and imaging front-end processing, motor and motion controllers, low-cost software-defined radios, and FPGA-based PCIe endpoint or USB-protocol expansion cards. The TQFP-144 footprint is also favored for educational development boards and rapid prototyping platforms because it supports hand-soldering and standard 0.5 mm-pitch PCB manufacturing.
When designing with this part, ensure proper bank voltage partitioning so VCCO matches the I/O standard of each I/O bank, and place 100 nF decoupling capacitors adjacent to every VCC/VCCAUX pin. ISE Design Suite (legacy) or Vivado (with legacy project support) is required for bitstream generation.
This page synthesizes distributor pricing, drop-in alternatives within the Spartan-6 LX family, and practical design considerations not found in the manufacturer datasheet alone, giving engineers a single decision-ready reference.
Alternatif penggantian untuk XC6SLX9-2TQG144C — paket yang sama, pin-pada-pin kompatibel. Bagian paket yang berbeda memerlukan kerja ulang PCB diabaikan.
Variasi di dalam seri ini
Model-series yang sama yang kompatibel dengan penggantian XC6SLX9-2TQG144C (sama faktor bentuk dan footprint) — berbeda di dalam Package, RoHS Status, Operating Temperature, Logic Cells, Process Technology.
XC6SLX9-2TQG144I
✅ Drop-InKontak untuk harga
Lihat Datasheet →XC6SLX9-3TQG144C
✅ Drop-InKontak untuk harga
Lihat Datasheet →XC6SLX4-2TQG144C
✅ Drop-InKontak untuk harga
Lihat Datasheet →XC6SLX9-2TQG144CES
✅ Drop-In📋 Alternatif referensi (tidak dalam katalog)
XC6SLX9-2FTG256C
✅ Drop-InKontak untuk harga
Lihat Datasheet →XC6SLX9-2TQG144C Rating Maksimal & Karakteristik Listrik
| Family | Spartan-6 LX |
| Logic Cells | 9152 |
| System Gates | 589824 |
| Configurable Logic Blocks (CLBs) | 715 |
| User I/O Count | 102 |
| Operating Frequency (max) | 375 MHz |
| Clock Management | DCM + PLL |
| Block RAM | 64 Kbit per block (16 blocks) |
| DSP Slices | DSP48A1 |
| Core Voltage (VCCINT) | 1.14 V to 1.26 V |
| Process Technology | 45 nm CMOS, 9-metal layer copper |
| Suhu Kerja | 0C to +85C (commercial, C grade) |
| Paket | TQFP-144 (TQG144), 20 x 20 mm, 0.5 mm pitch |
| Tipe Mounting | Surface Mount |
| Lead-Free Status | Lead Free |
| Status RoHS | Compliant |
Konfigurasi Pin XC6SLX9-2TQG144C
| Pin produk 1 | IO_L1N_VREF_0 — I/O bank 0 - general I/O with VREF reference |
| Pin produk 2 | IO_L1P_0 — I/O bank 0 - general I/O |
| Pin produk 3 | IO_L2N_0 — I/O bank 0 - general I/O |
| Pin produk 4 | IO_L2P_0 — I/O bank 0 - general I/O |
| Pin produk 5 | IO_L3N_0 — I/O bank 0 - general I/O |
| Pin produk 6 | IO_L3P_0 — I/O bank 0 - general I/O |
| Pin produk 7 | IO_L4N_0 — I/O bank 0 - general I/O |
| Pin produk 8 | IO_L4P_0 — I/O bank 0 - general I/O |
| Pin produk 9 | IO_L5N_0 — I/O bank 0 - general I/O |
| Pin produk 10 | IO_L5P_0 — I/O bank 0 - general I/O |
| Pin produk 11 | GND — Digital ground |
| Pin produk 12 | VCCO_0 — Output voltage for bank 0 |
| Pin produk 13 | IO_L6N_0 — I/O bank 0 - general I/O |
| Pin produk 14 | IO_L6P_0 — I/O bank 0 - general I/O |
| Pin produk 15 | IO_L7N_0 — I/O bank 0 - general I/O |
| Pin produk 16 | IO_L7P_0 — I/O bank 0 - general I/O |
| Pin produk 17 | IO_L1N_VREF_1 — I/O bank 1 - general I/O with VREF |
| Pin produk 18 | IO_L1P_1 — I/O bank 1 - general I/O |
| Pin produk 19 | IO_L2N_1 — I/O bank 1 - general I/O |
| Pin produk 20 | IO_L2P_1 — I/O bank 1 - general I/O |
| Pin produk 21 | IO_L3N_1 — I/O bank 1 - general I/O |
| Pin produk 22 | IO_L3P_1 — I/O bank 1 - general I/O |
| Pin produk 23 | GND — Digital ground |
| Pin produk 24 | VCCO_1 — Output voltage for bank 1 |
| Pin produk 25 | IO_L4N_1 — I/O bank 1 - general I/O |
| Pin produk 26 | IO_L4P_1 — I/O bank 1 - general I/O |
| Pin produk 27 | IO_L5N_1 — I/O bank 1 - general I/O |
| Pin produk 28 | IO_L5P_1 — I/O bank 1 - general I/O |
| Pin produk 29 | IO_L6N_1 — I/O bank 1 - general I/O |
| Pin produk 30 | IO_L6P_1 — I/O bank 1 - general I/O |
| Pin produk 31 | IO_L7N_1 — I/O bank 1 - general I/O |
| Pin produk 32 | IO_L7P_1 — I/O bank 1 - general I/O |
| Pin produk 33 | IO_L8N_VREF_1 — I/O bank 1 - general I/O with VREF |
| Pin produk 34 | IO_L8P_1 — I/O bank 1 - general I/O |
| Pin produk 35 | IO_L9N_1 — I/O bank 1 - general I/O |
| Pin produk 36 | IO_L9P_1 — I/O bank 1 - general I/O |
| Pin produk 37 | IO_L10N_1 — I/O bank 1 - general I/O |
| Pin produk 38 | IO_L10P_1 — I/O bank 1 - general I/O |
| Pin produk 39 | GND — Digital ground |
| Pin produk 40 | VCCO_1 — Output voltage for bank 1 |
| Pin produk 41 | IO_L11N_1 — I/O bank 1 - general I/O |
| Pin produk 42 | IO_L11P_1 — I/O bank 1 - general I/O |
| Pin produk 43 | IO_L12N_VRP_1 — I/O bank 1 - DCI bias reference |
| Pin produk 44 | IO_L12P_VRN_1 — I/O bank 1 - DCI bias reference |
| Pin produk 45 | IO_L1N_2 — I/O bank 2 - general I/O |
| Pin produk 46 | IO_L1P_2 — I/O bank 2 - general I/O |
| Pin produk 47 | IO_L2N_2 — I/O bank 2 - general I/O |
| Pin produk 48 | IO_L2P_2 — I/O bank 2 - general I/O |
| Pin produk 49 | IO_L3N_2 — I/O bank 2 - general I/O |
| Pin produk 50 | IO_L3P_2 — I/O bank 2 - general I/O |
| Pin produk 51 | GND — Digital ground |
| Pin produk 52 | VCCO_2 — Output voltage for bank 2 |
| Pin produk 53 | IO_L4N_2 — I/O bank 2 - general I/O |
| Pin produk 54 | IO_L4P_2 — I/O bank 2 - general I/O |
| Pin produk 55 | IO_L5N_2 — I/O bank 2 - general I/O |
| Pin produk 56 | IO_L5P_2 — I/O bank 2 - general I/O |
| Pin produk 57 | IO_L6N_2 — I/O bank 2 - general I/O |
| Pin produk 58 | IO_L6P_2 — I/O bank 2 - general I/O |
| Pin produk 59 | IO_L7N_2 — I/O bank 2 - general I/O |
| Pin produk 60 | IO_L7P_2 — I/O bank 2 - general I/O |
| Pin produk 61 | VCCAUX — Auxiliary supply (2.5 V) |
| Pin produk 62 | IO_L8N_2 — I/O bank 2 - general I/O |
| Pin produk 63 | IO_L8P_2 — I/O bank 2 - general I/O |
| Pin produk 64 | IO_L9N_2 — I/O bank 2 - general I/O |
| Pin produk 65 | IO_L9P_2 — I/O bank 2 - general I/O |
| Pin produk 66 | IO_L10N_2 — I/O bank 2 - general I/O |
| Pin produk 67 | IO_L10P_2 — I/O bank 2 - general I/O |
| Pin produk 68 | GND — Digital ground |
| Pin produk 69 | VCCO_2 — Output voltage for bank 2 |
| Pin produk 70 | IO_L11N_2 — I/O bank 2 - general I/O |
| Pin produk 71 | IO_L11P_2 — I/O bank 2 - general I/O |
| Pin produk 72 | IO_L12N_2 — I/O bank 2 - general I/O |
| Pin produk 73 | IO_L12P_2 — I/O bank 2 - general I/O |
| Pin produk 74 | CMPCS_B_2 — Bank 2 clock-capable pin (CS / B) |
| Pin produk 75 | CCLK — Configuration clock input |
| Pin produk 76 | DONE — Configuration DONE indicator |
| Pin produk 77 | M[2:0] — Configuration mode select pins |
| Pin produk 78 | PROGRAM_B — Program/Reset (active low) |
| Pin produk 79 | INIT_B — Initialisation indicator (active low) |
| Pin produk 80 | TDO — JTAG test data out |
| Pin produk 81 | TCK — JTAG test clock |
| Pin produk 82 | TDI — JTAG test data in |
| Pin produk 83 | TMS — JTAG test mode select |
| Pin produk 84 | VCCINT — Internal core supply (1.2 V) |
| Pin produk 85 | GND — Digital ground |
| Pin produk 86 | IO_L1N_3 — I/O bank 3 - general I/O |
| Pin produk 87 | IO_L1P_3 — I/O bank 3 - general I/O |
| Pin produk 88 | IO_L2N_3 — I/O bank 3 - general I/O |
| Pin produk 89 | IO_L2P_3 — I/O bank 3 - general I/O |
| Pin produk 90 | IO_L3N_3 — I/O bank 3 - general I/O |
| Pin produk 91 | IO_L3P_3 — I/O bank 3 - general I/O |
| Pin produk 92 | IO_L4N_3 — I/O bank 3 - general I/O |
| Pin produk 93 | IO_L4P_3 — I/O bank 3 - general I/O |
| Pin produk 94 | GND — Digital ground |
| Pin produk 95 | VCCO_3 — Output voltage for bank 3 |
| Pin produk 96 | IO_L5N_3 — I/O bank 3 - general I/O |
| Pin produk 97 | IO_L5P_3 — I/O bank 3 - general I/O |
| Pin produk 98 | IO_L6N_3 — I/O bank 3 - general I/O |
| Pin produk 99 | IO_L6P_3 — I/O bank 3 - general I/O |
| Pin produk 100 | IO_L7N_3 — I/O bank 3 - general I/O |
| Pin produk 101 | IO_L7P_3 — I/O bank 3 - general I/O |
| Pin produk 102 | CMPCS_A_3 — Bank 3 clock-capable pin (CS / A) |
| Pin produk 103 | IO_L8N_VREF_3 — I/O bank 3 - general I/O with VREF |
| Pin produk 104 | IO_L8P_3 — I/O bank 3 - general I/O |
| Pin produk 105 | IO_L9N_3 — I/O bank 3 - general I/O |
| Pin produk 106 | IO_L9P_3 — I/O bank 3 - general I/O |
| Pin produk 107 | VCCAUX — Auxiliary supply (2.5 V) |
| Pin produk 108 | IO_L10N_3 — I/O bank 3 - general I/O |
| Pin produk 109 | IO_L10P_3 — I/O bank 3 - general I/O |
| Pin produk 110 | IO_L11N_3 — I/O bank 3 - general I/O |
| Pin produk 111 | IO_L11P_3 — I/O bank 3 - general I/O |
| Pin produk 112 | GND — Digital ground |
| Pin produk 113 | IO_L12N_VRP_3 — I/O bank 3 - DCI bias reference |
| Pin produk 114 | IO_L12P_VRN_3 — I/O bank 3 - DCI bias reference |
| Pin produk 115 | IO_L1N_4 — I/O bank 4 - general I/O |
| Pin produk 116 | IO_L1P_4 — I/O bank 4 - general I/O |
| Pin produk 117 | IO_L2N_4 — I/O bank 4 - general I/O |
| Pin produk 118 | IO_L2P_4 — I/O bank 4 - general I/O |
| Pin produk 119 | IO_L3N_VREF_4 — I/O bank 4 - general I/O with VREF |
| Pin produk 120 | IO_L3P_4 — I/O bank 4 - general I/O |
| Pin produk 121 | VCCINT — Internal core supply (1.2 V) |
| Pin produk 122 | IO_L4N_4 — I/O bank 4 - general I/O |
| Pin produk 123 | IO_L4P_4 — I/O bank 4 - general I/O |
| Pin produk 124 | IO_L5N_4 — I/O bank 4 - general I/O |
| Pin produk 125 | IO_L5P_4 — I/O bank 4 - general I/O |
| Pin produk 126 | IO_L6N_4 — I/O bank 4 - general I/O |
| Pin produk 127 | IO_L6P_4 — I/O bank 4 - general I/O |
| Pin produk 128 | GND — Digital ground |
| Pin produk 129 | VCCO_4 — Output voltage for bank 4 |
| Pin produk 130 | IO_L7N_4 — I/O bank 4 - general I/O |
| Pin produk 131 | IO_L7P_4 — I/O bank 4 - general I/O |
| Pin produk 132 | IO_L8N_4 — I/O bank 4 - general I/O |
| Pin produk 133 | IO_L8P_4 — I/O bank 4 - general I/O |
| Pin produk 134 | VCCAUX — Auxiliary supply (2.5 V) |
| Pin produk 135 | GND — Digital ground |
| Pin produk 136 | IO_L9N_4 — I/O bank 4 - general I/O |
| Pin produk 137 | IO_L9P_4 — I/O bank 4 - general I/O |
| Pin produk 138 | IO_L10N_4 — I/O bank 4 - general I/O |
| Pin produk 139 | IO_L10P_4 — I/O bank 4 - general I/O |
| Pin produk 140 | IO_L11N_4 — I/O bank 4 - general I/O |
| Pin produk 141 | IO_L11P_4 — I/O bank 4 - general I/O |
| Pin produk 142 | SUSPEND — Suspend mode control pin |
| Pin produk 143 | AWAKE — Suspend wake-up indicator |
| Pin produk 144 | HSWAPEN — Hot-swap enable for configuration |
Aplikasi Umum
XC6SLX9-2TQG144C cocok untuk 7 aplikasis: Industrial Control and Bridging, Video and Imaging Front-End Processing, Embedded Computing and Software-Defined Peripherals, Communications and Networking Bridge, Educational Development Boards and Prototyping, Motor Control and Drive Electronics, Consumer Audio/Video Processing.
Industrial Control and Bridging
The XC6SLX9-2TQG144C delivers 9,152 logic cells, 16 DSP48A1 slices, and 64 Kbit of block RAM, which gives industrial-control engineers enough headroom to implement protocol-bridging logic between legacy fieldbus (RS-485, CAN, Modbus) and modern Ethernet TCP/IP stacks. Its 102 user I/Os hosted on a 0.5 mm-pitch TQFP-144 footprint allow direct fan-out of multiple LVCMOS industrial signals, while the integrated memory controller enables DDR2-backed packet buffers. Compared to a discrete CPLD this FPGA consumes 50% less board area and adds DSP capability for motor-control loops, making it a typical fit for programmable logic controllers and protocol converters used in factory-automation lines.
Direkomendasikan
Video and Imaging Front-End Processing
With up to 16 DSP48A1 slices running at 375 MHz, the XC6SLX9-2TQG144C can process one D1 (720 x 576) video stream in real time, executing color-space conversion, gamma correction, or basic edge-detection filters. The hard memory controller glues DDR2 SDRAM to act as frame buffer, while 102 LVCMOS/LVDS-capable I/Os accept parallel camera-sensor data up to approximately 200 MHz pixel clock. Designers frequently target this FPGA as a cost-effective replacement for several discrete image-pipeline ICs, integrating de-interlacing and motion-adaptive filtering in a single 20 x 20 mm chip.
Direkomendasikan
Embedded Computing and Software-Defined Peripherals
The XC6SLX9 LX9 die can host an open-source 32-bit soft-core processor such as MicroBlaze or RISC-V, enabling the FPGA to act as a programmable system-on-chip for low-cost embedded peripherals. Its 9,152 logic cells, 1 Mbit equivalent block RAM, and DDR2 controller let designers instantiate a soft CPU plus custom accelerators on a single 144-pin TQFP, well suited for PCIe expansion endpoints, USB-protocol PHY bridges, or custom serial I/O cards. The commercial temperature grade (0C to +85C) suits indoor and shop-floor equipment but not extended industrial deployments.
Direkomendasikan
Communications and Networking Bridge
The XC6SLX9-2TQG144C is widely used in wireless backhaul and bridging applications where its LVDS-capable I/Os and integrated GTP transceivers support CPRI-like links up to several hundred megabits per second. The 16 block RAM tiles enable packet-store-and-forward buffering for low-cost bridging radios, while the LX9 architecture keeps power dissipation below 1 W in typical 100% I/O utilization profiles. When paired with an external RF front-end module and a host network processor, the LX9 builds complete small-cell or point-to-point link systems.
Direkomendasikan
Educational Development Boards and Prototyping
The 0.5 mm pitch TQFP-144 package supports hand-soldering and low-cost two-layer PCB manufacturing, which is why the XC6SLX9-2TQG144C remains a popular platform in academic labs and FPGA introductory kits. Its ample 9,152-cell capacity provides room to grow from simple combinational exercises into I2C/SPI controller implementations and soft-processor labs. Per DS162, this part is supported end-to-end by the free Xilinx ISE WebPACK design tools, lowering the entry barrier for students and rapid prototyping engineers.
Direkomendasikan
Motor Control and Drive Electronics
The XC6SLX9 LX9 die supplies 16 DSP48A1 slices that execute field-oriented control (FOC) and space-vector PWM algorithms for three-phase motor drives at deterministic sub-microsecond latency. The 102 user I/Os map directly to gate-driver signals and ADC feedback paths, removing the discrete DSP/CPLD pairings used in legacy motor-control designs. Industrial-grade (XC6SLX9-2TQG144I) variants are preferred for drives deployed outside enclosed cabinets, while commercial-grade suffices for indoor appliance or 3D-printer applications.
Direkomendasikan
Consumer Audio/Video Processing
The XC6SLX9-2TQG144C is used in set-top boxes and consumer audio-video peripherals to implement HDMI re-timers, audio sample-rate converters, or LED-panel multiplex drivers. Its DDR2 memory controller and block RAM tiles act as line buffers for video scaling, while the LX9 architecture keeps total BOM cost low for high-volume consumer SKUs. Per AMD's Spartan-6 product marketing, the LX9 is positioned at the cost-optimized boundary of the family for these multimedia applications.
Direkomendasikan
Ringkasan Produk Direkomendasikan
Data referensi engineering untuk XC6SLX9-2TQG144C — pembandingan, panduan desain, dan informasi konformitas.
Panduan Pemilihan
Pembandingan dengan Alternatif
| Parameter Umum | Produk Ini | XC6SLX9-2TQG144I | XC6SLX9-3TQG144C | XC6SLX4-2TQG144C |
|---|---|---|---|---|
| Brand | AMD (Xilinx) | AMD (Xilinx) | AMD (Xilinx) | AMD (Xilinx) |
| Package | TQFP-144 (TQG144) | TQFP-144 (TQG144) - same | TQFP-144 (TQG144) - same | TQFP-144 (TQG144) - same |
| Logic Cells | 9152 | 9152 | 9152 | 3840 (-58%) |
| Speed Grade | -2 | -2 | -3 (higher performance) | -2 |
| Operating Temperature | 0C to +85C (Commercial) | -40C to +100C (Industrial) | 0C to +85C (Commercial) | 0C to +85C (Commercial) |
| User I/O Count | 102 | 102 | 102 | 102 |
| Process / Family | Spartan-6 LX, 45nm | Spartan-6 LX, 45nm | Spartan-6 LX, 45nm | Spartan-6 LX, 45nm |
| Approx. Unit Price (qty 1) | ~$22.50 | ~$26.00 | ~$28.50 | ~$17.00 |
| Pin-Compatible Drop-In | - | Yes | Yes | Yes (requires ISE retarget) |
Diferensiator Kunci
- TQFP-144 hand-solderable package (vsXC6SLX9-2FTG256C)
- Largest LX9 logic density in TQG144 (vsXC6SLX4-2TQG144C)
- Commercial temperature grade at lower cost (vsXC6SLX9-2TQG144I)
- Mature ISE/Vivado tool support with abundant design examples (vsXC6SLX25/LX45 in larger packages)
Catatan Desain
Estimated: at typical 100% I/O switching utilization on a 1.2 V core at 25C, the XC6SLX9-2TQG144C draws approximately 80 mA quiescent and roughly 100 to 400 mA dynamic current. Design a multi-rail supply with 0.5% accuracy on VCCINT (1.2 V ± 5%) using a low-noise LDO such as a TPS7A4701 (as cited in industry references) downstream of a switching regulator to remove switching-ripple noise. Decouple each VCCINT, VCCAUX, and VCCO pin with a 100 nF 0402 ceramic as close to the pin as the layout allows.
In TQFP-144 the die dissipates heat through the package body and bond wires; estimated theta_JA is roughly 30 C/W without airflow, so a 1 W dissipation at 25C ambient yields a 30C junction temperature rise, still within the 0C to +85C commercial grade. For designs above 1.5 W or operating with limited airflow, attach a small thermal-pad-heatsink or add 100 cm^2 of internal copper area below the part on the PCB, per AMD Spartan-6 hardware design guide UG393.
Route matched-pair LVDS or DDR2 signals on the TQG144 0.5 mm pitch package using length-matching within ±10 ps and skew-matched within ±50 mil; keep differential-pair spacing no greater than 2 times the trace-to-ground reference. Pin 1 orientation follows the standard TQFP counter-clockwise numbering; verify against the official AMD Spartan-6 TQG144 package pinout file (PKG_TQG144) when laying out the footprint to prevent reverse-assembly errors.
Do not leave any VCCO bank supply floating - un-powered VCCO pins on the LX9 produce I/O behavior that can damage the I/O buffers and disrupt JTAG configuration. Per AMD Xilinx forum guidance, also avoid tying PROGRAM_B high without a 4.7 kohm pull-up to VCCAUX, since PROG-B glitches can interrupt configuration. Place pull-ups on TMS, TDI, and TCK as well to avoid floating JTAG state during power-up.
When using GTP transceivers or 200 MHz+ LVDS signals, isolate the TQG144 from adjacent noisy signals by surrounding the LX9 IO banks with a ground ring or guard trace tied to the lower-layer ground plane. Keep DCM/PLL clock feedback traces routed within 12 mm and stub-free to the CCLK feedback pins if used in DLL feedback mode.
Informasi Konformitas
RoHS compliant and lead-free per AMD product environmental specifications on DigiKey/Mouser. Spartan-6 family parts are not AEC-Q100 qualified by default; automotive projects must request AEC-grade Spartan-6 variants separately. Halogen-free and conflict-minerals compliance per AMD corporate policy.
