CDK8307CILP64 vs CDK8307AILP64 比較
詳細な並列比較: CDK8307CILP64 メーカー: MaxLinear および CDK8307AILP64 メーカー: MaxLinear。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | CDK8307CILP64 | CDK8307AILP64 |
|---|---|---|
| ブランド | MaxLinear | MaxLinear |
| カテゴリ | ADC/DAC | ADC/DAC |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $11.95 | $18.45 |
| 分解能 | 12/13-bit (selectable) | 12/13-bit (selectable) |
| Sample Rate | 65 MSPS maximum (20/40/50/65 MSPS grades) | — |
| Number of Channels | 8 (simultaneous sampling) | 8 (simultaneous sampling) |
| Digital Output Interface | Serial LVDS | — |
| Input Type | Differential analog inputs | — |
| Reference | Internal (integrated bandgap) | Internal reference (integrated) |
| Control Interface | SPI-compatible serial | Serial programming interface (SPI-style) |
| パッケージ | 64-pin LQFP (LP64) | 64-pin QFN (ILP64) |
| Architecture | Proprietary pipeline ADC | Pipelined ADC with proprietary core |
| Power Profile | Ultra-low power (per-channel) | — |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature range] |
| Supply Voltage (AVDD) | [DATA_NEEDED: AVDD nominal] | — |
| Supply Voltage (DRVDD/LVDS) | [DATA_NEEDED: DRVDD nominal] | — |
| ENOB | [DATA_NEEDED: effective number of bits] | — |
| SNR | [DATA_NEEDED: signal-to-noise ratio] | — |
| SFDR | [DATA_NEEDED: spurious-free dynamic range] | — |
| RoHS ステータス | Compliant (per MaxLinear product page) | Compliant |
| 実装タイプ | Surface Mount | Surface Mount |
| Sample Rate Range | — | 20 / 40 / 50 / 65 / 80 MSPS |
| Output Interface | — | Serial LVDS |
| 電源電圧 | — | [DATA_NEEDED: supply voltage] |
| Power Dissipation (Typ) | — | Ultra-low power (per-channel shutdown) |
| Shutdown Modes | — | Per-channel + full-chip idle (via external pin) |
| FPGA Compatibility | — | Designed to interface with major FPGA vendors |
| Original Brand | — | Cadeka / Exar (now MaxLinear) |