EP1SGX25FF1020I5N vs EP1SGX25FF1020I7 比較

詳細な並列比較: EP1SGX25FF1020I5N メーカー: Altera および EP1SGX25FF1020I7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Altera
EP1SGX25FF1020I5N EP1SGX25FF1020I5N - Stratix GX FPGA, 25,660 LEs, FBGA-1020 | Altera

EP1SGX25FF1020I5N - Stratix GX FPGA, 25,660 LEs, FBGA-1020 | Altera

EP1SGX25FF1020I5N ⚠ ラストタイムバイ

仕様比較

パラメータ EP1SGX25FF1020I5N EP1SGX25FF1020I7
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 ラストバイ Obsolete
在庫状況 In Stock In Stock
単価(USD) $2,050.00 $210.00
Family Stratix GX Stratix GX
Series EP1SGX25 EP1SGX25
Logic Elements (LEs) 25,660 —
Configurable Logic Blocks (CLBs) 2,566 2,566
Process Technology 130 nm CMOS 130 nm CMOS
Core Supply Voltage 1.5 V 1.5 V
Maximum Operating Frequency [DATA_NEEDED: datasheet fmax value] —
Operating Temperature Grade Industrial (I) —
動作温度範囲 0 C to 85 C (per digchip listing) —
パッケージ FBGA-1020 (33 x 33 mm, 1.00 mm pitch) FC-FBGA-1020 (Flip-Chip Fine-pitch BGA)
Ball Count 1020 —
Terminal Pitch 1.00 mm [DATA_NEEDED: terminal pitch]
実装タイプ Surface Mount (BGA) Surface Mount (FC-FBGA)
Lead-Free Finish Yes (lead-free, per digchip) —
Logic Family CMOS —
RoHS ステータス Compliant (per digchip) [DATA_NEEDED: RoHS compliance]
Speed Grade 5 7 (highest production grade)
Logic Cells — 25,660
Number of Terminals / Balls — 1020
Terminal Form — Ball
Temperature Grade (suffix 'I') — Industrial
Combinatorial Delay per CLB — 9.48 ns (per Microchip USA listing)
Combinatorial Delay Variant — [DATA_NEEDED: tPD per CLB variant speed grade]
Maximum Internal Clock Frequency — [DATA_NEEDED: max Fmax in MHz per speed grade]
Embedded Transceivers — Yes (Stratix GX feature)
Configuration Method — SRAM-based (volatile, requires configuration at power-up)
MSLレベル — [DATA_NEEDED: MSL level]

データシート&リソース

すべての製品を閲覧 BOMを作成 見積もり依頼