EP2A25F672I6 vs EP2A25F672I-7 比較
詳細な並列比較: EP2A25F672I6 メーカー: Intel および EP2A25F672I-7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A25F672I6 | EP2A25F672I-7 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $178.00 | $171.00 |
| Family | APEX II | APEX II |
| Logic Elements (typical gates) | 25,000 | — |
| Fabric Architecture | SRAM-based LUT | — |
| Process Technology | 0.18 µm CMOS | 0.15 um |
| パッケージ | 672-ball FineLine BGA (FBGA-672) | 672-pin FC-FBGA |
| Core Voltage | 1.5 V | 1.5 V |
| Configuration Method | External SRAM configuration device (EPC series) | JTAG, Passive Serial, Active Serial |
| Temperature Grade | Industrial (-40 °C to +100 °C ambient) | Industrial (I) |
| Speed Grade | 6 | -7 |
| Embedded Memory | Embedded System Blocks (ESB), dual-port RAM / CAM | ESBs (Embedded System Blocks) |
| DSP Blocks | MultiCore dedicated multipliers | — |
| Boundary Scan | JTAG (IEEE 1149.1) compliant | — |
| Clock Management | Dedicated PLL / clock tree circuitry | — |
| I/O Bank Count | [DATA_NEEDED: number of user I/O banks] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| System Gates | — | 900K (approximately) |
| Logic Cells / Elements | — | 24,320 |
| Maximum Operating Frequency | — | 500 MHz |
| 動作温度 | — | -40C to +85C (Industrial) |
| JTAG Support | — | IEEE 1149.1 Boundary Scan |