EPM240ZM100C7N vs 5M240ZM68I5N 比較
詳細な並列比較: EPM240ZM100C7N メーカー: Altera および 5M240ZM68I5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM240ZM100C7N | 5M240ZM68I5N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $6.10 | $1.25 |
| Family | MAX II Z | — |
| Series | MAX II | MAX V |
| Logic Elements | 240 | 240 |
| Macrocells | 192 | — |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| User I/Os | 80 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| パッケージ | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | — |
| Configuration Memory | On-chip non-volatile flash | Nonvolatile Flash |
| Process Technology | 0.18 µm 6-layer-metal flash | — |
| JTAG Support | IEEE 1149.1 (programming + boundary-scan) | — |
| 動作温度 | 0 °C to +85 °C (commercial) | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Lead-Free / RoHS | Compliant per datasheet | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Package Type | — | TFBGA-68 |
| Number of Terminals | — | 68 (ball) |
| Package Code | — | TFBGA |
| Form of Terminal | — | Ball |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| JTAG Interface | — | TMS, TDI, TDO, TCK (Bank 1) |
| Programming Method | — | JTAG / in-system programmable |
| 電源電圧 | — | [DATA_NEEDED: VCCINT and VCCIO levels] |
| I/O Standards | — | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) |
| RoHS ステータス | — | Compliant |
| Lead Free | — | Yes |