EPM3256ATI144-7N vs EPM3256ATI144-10N 比較
詳細な並列比較: EPM3256ATI144-7N メーカー: Altera および EPM3256ATI144-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM3256ATI144-7N - 256-Macrocell MAX 3000A CPLD, 7.5ns, TQFP-144 | Altera
EPM3256ATI144-7N Obsolete仕様比較
| パラメータ | EPM3256ATI144-7N | EPM3256ATI144-10N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.95 | $10.25 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 116 | — |
| Propagation Delay (tPD) | 7.5 ns (typical) | 10 ns |
| Maximum Internal Frequency | 126.6 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| MultiVolt I/O Logic Levels | 5.0 V / 3.3 V / 2.5 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG / ISP | IEEE Std. 1532 compliant | — |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | — |
| Hot-Socketing Support | Yes | — |
| パッケージ | TQFP-144 (20 x 20 mm, 0.5 mm pitch) | 144-pin TQFP |
| 動作温度 | -40C to +85C (industrial) | -40 C to +85 C (industrial, "I" suffix) |
| RoHS ステータス | Compliant (lead-free) | Compliant |
| User I/Os | — | 116 |
| Logic Blocks / Logic Elements | — | 16 |
| Max Frequency (fMAX) | — | 95.2 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| Boundary-Scan Test (BST) | — | Yes, IEEE Std. 1149.1 (JTAG) |
| Lead-Free / Pb-Free | — | Yes ("N" suffix) |
| Process Technology | — | CMOS EEPROM-based, non-volatile |
| 実装タイプ | — | Surface Mount |
| MSLレベル | — | 3 (per JEDEC J-STD-020, typical for TQFP) |