EPM9560RC304-2 vs EPM9560RCRC304-15 比較
詳細な並列比較: EPM9560RC304-2 メーカー: Intel および EPM9560RCRC304-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 Obsolete仕様比較
| パラメータ | EPM9560RC304-2 | EPM9560RCRC304-15 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $55.00 | $0.00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (EPLD - Erasable PLD) | — |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: LAB count] |
| Macrocells | [DATA_NEEDED: macrocell count] | — |
| User I/O Pins | 304 | — |
| パッケージ | 304-pin RQFP (RC) | 304-pin RQFP (PowerQuad Flat Pack) |
| Speed Grade | -2 | — |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| 動作温度 | Commercial (0C to +70C) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Third-generation Multiple Array MatriX (MAX) |
| Configuration Memory | On-chip EEPROM (non-volatile) | EEPROM (non-volatile, in-system programmable) |
| Device Family | — | MAX 9000 (EPM9560) |
| Logic Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Frequency | — | 117.6 MHz |
| 電源電圧 | — | 5.0 V |
| In-System Programmability (ISP) | — | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Interface | — | IEEE Std. 1149.1 (built-in) |
| 動作温度範囲 | — | [DATA_NEEDED: operating temperature range] |
| Number of User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Lead Finish | — | [DATA_NEEDED: lead finish] |