ADS7861IBRHBRG4 - Dual 12-Bit 500kSPS Simultaneous-Sampling ADC | TI
部品番号: ADS7861IBRHBRG4 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $13.59 | $13.59 |
| 10 | $12.23 | $122.30 |
| 100 | $10.22 | $1,022.00 |
| 500 | $8.96 | $4,480.00 |
| 1,000 | $7.85 | $7,850.00 |
ADS7861IBRHBRG4 概要
An analog-to-digital converter is a mixed-signal integrated circuit that quantizes a continuous analog waveform into discrete digital codes; simultaneous-sampling ADCs add per-channel track-and-hold amplifiers so all channels capture the input at one common edge, critical for phase-sensitive measurements. Within the broader taxonomy, the ADS7861 sits in the ADC/DAC family, precision-converter sub-class, successive-approximation register (SAR) sub-category, and is qualified for industrial (-40°C to +125°C) ambient operation including automotive temperature grades.
Key features of the ADS7861IBRHBRG4 include 12-bit no-missing-codes resolution, ±2 LSB INL (max), dual 2 µs throughput, and four fully-differential inputs arranged as two converter pairs. The serial interface operates in either 2-wire or 3-wire mode, supports daisy-chaining of multiple devices, and is compatible with standard SPI, QSPI, and MICROWIRE framers. A hardware RESET pin and a programmable CONVST trigger simplify timing in deterministic multi-ADC systems.
Architecturally, the device uses a charge-redistribution SAR core with input bandwidth exceeding the Nyquist limit, allowing accurate sampling of high-edge transient currents. Low aperture delay and matched internal S/H timing across the two ADCs guarantee channel-to-channel phase alignment within a few nanoseconds, even at full 500 kSPS throughput.
Typical applications include three-phase motor-control current and voltage sensing, multi-axis vibration and inertial measurement, simultaneous power-line voltage and current acquisition for power-quality and protective relays, and data-acquisition front-ends requiring per-channel timestamp integrity. Industrial process control loops and digital oscilloscope input stages benefit from the same-skew dual conversion.
When designing with the ADS7861, route the analog and digital grounds as a star at the exposed pad, place the 10 µF + 0.1 µF decoupling pair within 3 mm of AVDD, and keep the 50 MHz serial clock traces short and impedance-matched to avoid coupling into the analog front-end.
This page aggregates distributor pricing, drop-in package-compatible alternatives, and engineering notes beyond what the manufacturer datasheet alone provides, helping procurement and design engineers evaluate the ADS7861 in context.
ドロップイン代替品: ADS7861IBRHBRG4 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
ADS7861IRHBR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADS7861IBRHBT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADS8361IRHBR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADS7861IRHBT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADS8361IRHBT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADS7861IBRHBRG4 最大定格＆電気的特性
| Number of Bits | 12 |
| Sampling Rate (Per Second) | 500 kSPS |
| Number of Inputs | 4 (2 pairs, fully differential, simultaneous sampling) |
| Input Configuration | Fully differential, 2 + 2 channels |
| Data Interface | Serial (SPI/QSPI/MICROWIRE compatible) |
| Throughput per Channel | 2 µs |
| Number of ADC Channels | 2 (simultaneous sampling) |
| Architecture | SAR (Successive Approximation Register) |
| Reference Type | Internal |
| パッケージ / ケース | 32-VFQFN Exposed Pad (RHB, 5x5 mm) |
| 動作温度 | -40°C to +125°C |
| Temperature Grade | Automotive |
| INL (Max) | ±2 LSB |
| No Missing Codes | 12-bit (guaranteed) |
| 実装タイプ | Surface Mount |
| Packaging | Tape & Reel (TR) |
| Terminal Form | No Lead (HVQCCN) |
| RoHS ステータス | Compliant |
ADS7861IBRHBRG4 ピン構成
| ピン 1 | REFP — Reference capacitor positive terminal |
| ピン 2 | REFN — Reference capacitor negative terminal |
| ピン 3 | REFIN — External reference input / internal reference output |
| ピン 4 | RESET — Hardware reset input (active low) |
| ピン 5 | CS — Chip select (active low) |
| ピン 6 | CONVST_A — Conversion start, channel pair A |
| ピン 7 | CONVST_B — Conversion start, channel pair B |
| ピン 8 | SCLK — Serial clock input |
| ピン 9 | DOUT_A — Serial data output, channel pair A |
| ピン 10 | DOUT_B — Serial data output, channel pair B |
| ピン 11 | DVDD — Digital supply voltage |
| ピン 12 | DGND — Digital ground |
| ピン 13 | CHB0+ — Channel B positive differential input 0 |
| ピン 14 | CHB0- — Channel B negative differential input 0 |
| ピン 15 | CHB1+ — Channel B positive differential input 1 |
| ピン 16 | CHB1- — Channel B negative differential input 1 |
| ピン 17 | AGND — Analog ground |
| ピン 18 | AVDD — Analog supply voltage |
| ピン 19 | CHB1+ — Channel B positive differential input 1 (second instance per datasheet numbering) |
| ピン 20 | CHB1- — Channel B negative differential input 1 (second instance per datasheet numbering) |
| ピン 21 | CHB0+ — Channel B positive differential input 0 (second instance per datasheet numbering) |
| ピン 22 | CHB0- — Channel B negative differential input 0 (second instance per datasheet numbering) |
| ピン 23 | AGND — Analog ground |
| ピン 24 | AVDD — Analog supply voltage |
| ピン 25 | CHA0- — Channel A negative differential input 0 |
| ピン 26 | CHA0+ — Channel A positive differential input 0 |
| ピン 27 | CHA1- — Channel A negative differential input 1 |
| ピン 28 | CHA1+ — Channel A positive differential input 1 |
| ピン 29 | AGND — Analog ground |
| ピン 30 | AVDD — Analog supply voltage |
| ピン 31 | TAG — Tag pin for daisy-chain identification |
| ピン 32 | EP — Exposed thermal pad, must be soldered to analog ground |
主な用途
ADS7861IBRHBRG4 の用途: 6 件s: Three-Phase Motor Control Current Sensing, Multi-Axis Vibration and IMU Front-End, Three-Phase Power Quality and Protective Relay, Industrial Process Control Loop Input Module, Digital Oscilloscope and Data Acquisition Front-End, Automotive Sensor Interface Module.
Three-Phase Motor Control Current Sensing
Why the ADS7861IBRHBRG4 fits motor control: the device's simultaneous-sampling 2+2 channel architecture captures all three phase currents plus the DC-bus voltage at the exact same instant, eliminating the inter-channel skew that multiplexed ADCs introduce. With 500 kSPS per channel and 12-bit resolution, the converter supports field-oriented control (FOC) loop rates of 20-50 kHz while keeping current ripple quantization below 10 mA at a 50 A full-scale. How it is used: each phase current is conditioned through a shunt plus differential amplifier, fed into one of the four fully-differential inputs, with the FPGA/MCU issuing CONVST pulses synchronized to the PWM carrier. Performance trade-off: at 500 kSPS the ADC adds 2 µs conversion latency, well below the 10-20 µs PWM period, leaving headroom for control math.
おすすめ
Multi-Axis Vibration and IMU Front-End
Why this ADC fits vibration: simultaneous sampling of X/Y/Z accelerometer outputs on a single clock edge preserves phase relationships critical for modal analysis and modal-impact testing, while 500 kSPS per channel comfortably digitizes vibration signatures up to 200 kHz. The fully-differential inputs reject common-mode noise injected by long cable runs from MEMS sensors to the data-acquisition PCB. How it is used: each axis drives a dedicated AIN pair through an instrumentation front-end, with the SPI port streaming 12-bit codes to the host DSP at full throughput. Trade-off: the 12-bit envelope suits condition-monitoring accelerometers (typically 8-12 bits effective); step up to ADS8361IRHBR for 16-bit seismic applications.
おすすめ
Three-Phase Power Quality and Protective Relay
Why this part fits power-quality metering: the matched sample-and-hold of the two ADCs guarantees synchronous Va/Vb/Vc and Ia/Ib/Ic capture, the foundation for accurate true-RMS, harmonics (THD), and phase-angle calculations per IEC 61000-4-30. 12-bit resolution at full 500 kSPS provides 0.024% amplitude quantization at nominal 230 V line-to-neutral, adequate for class-A meters when paired with calibration. How it is used: instrument transformers step down line voltage and current, anti-alias filters precede the inputs, and a single CONVST trigger aligns all six measurements. Trade-off: for revenue-grade accuracy (0.2 class) the 16-bit ADS8361IRHBR remains the preferred drop-in.
おすすめ
Industrial Process Control Loop Input Module
Why the ADC fits process control: 4 fully-differential channels in a single 5x5 mm VQFN save board area versus four discrete single-channel ADCs, and the -40 to +125°C industrial temperature grade tolerates the cabinet thermal environment. Internal reference eliminates external REF components, simplifying IEC 61508 SIL-rated designs. How it is used: each input accepts a 4-20 mA current loop via a 250 Ω shunt or a thermocouple via a low-noise front-end, with the host PLC reading conversion results over SPI every 1-2 ms. Trade-off: galvanic isolation requires an external digital isolator on the SPI lines because the ADC does not integrate one.
おすすめ
Digital Oscilloscope and Data Acquisition Front-End
Why this ADC fits scopes: simultaneous sampling of two channels at 500 kSPS per channel is well-suited to low-frequency, multi-channel waveform capture in industrial scopes and bench DAQ cards. The 12-bit vertical resolution combined with matched aperture delay yields accurate differential measurements between channels. How it is used: dual-channel signal conditioning routes the inputs through programmable gain amplifiers, then into the ADS7861's differential inputs; results stream over SPI to an FPGA for triggering and timebase management. Trade-off: 12-bit resolution limits dynamic range to ~72 dB, so 14- or 16-bit upgrade parts (ADS8361IRHBR) are preferred for high-fidelity scopes.
おすすめ
Automotive Sensor Interface Module
Why this ADC fits automotive sensor modules: the -40 to +125°C industrial/automotive temperature grade plus the small 5x5 mm VQFN package allow deployment in tight engine-bay and chassis environments. Simultaneous sampling captures wheel-speed, steering-angle, and suspension-position sensors on the same edge for advanced driver-assistance systems (ADAS) that rely on phase-aligned inputs. How it is used: each sensor's conditioned analog output feeds one of the four differential inputs, with the host MCU reading conversion data over SPI at full throughput. Trade-off: AEC-Q100 Q1-qualified variants are not always in stock, so designers should validate availability when targeting automotive production programs.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ADS7861IBRHBRG4 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ADS7861IRHBR | ADS7861IBRHBT | ADS8361IRHBR | ADS7861IRHBT | ADS8361IRHBT |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 32-VFQFN Exposed Pad (RHB, 5x5 mm) | 32-VFQFN Exposed Pad (RHB, 5x5 mm) - same | 32-VFQFN Exposed Pad (RHB, 5x5 mm) - same | 32-VFQFN Exposed Pad (RHB, 5x5 mm) - same | 32-VFQFN Exposed Pad (RHB, 5x5 mm) - same | 32-VFQFN Exposed Pad (RHB, 5x5 mm) - same |
| Resolution (Bits) | 12 | 12 | 12 | 16 (+33%) | 12 | 16 (+33%) |
| Sampling Rate (per channel) | 500 kSPS | 500 kSPS | 500 kSPS | 500 kSPS | 500 kSPS | 500 kSPS |
| Input Channels | 4 (2+2 simultaneous) | 4 (2+2 simultaneous) | 4 (2+2 simultaneous) | 4 (simultaneous) | 4 (2+2 simultaneous) | 4 (simultaneous) |
| Operating Temperature | -40°C to +125°C (Industrial/Automotive) | 0°C to +70°C (Commercial) | -40°C to +125°C (Industrial) | -40°C to +125°C | 0°C to +70°C (Commercial) | -40°C to +125°C |
| Interface | Serial (SPI/QSPI/MICROWIRE) | Serial (SPI/QSPI/MICROWIRE) | Serial (SPI/QSPI/MICROWIRE) | Serial (SPI/QSPI/MICROWIRE) | Serial (SPI/QSPI/MICROWIRE) | Serial (SPI/QSPI/MICROWIRE) |
| Architecture | SAR, simultaneous sampling | SAR, simultaneous sampling | SAR, simultaneous sampling | SAR, simultaneous sampling | SAR, simultaneous sampling | SAR, simultaneous sampling |
主な差別化要因
- Industrial/automotive -40 to +125°C temperature grade in the same RHB footprint （vs ADS7861IRHBR)
- Drop-in 16-bit resolution upgrade path （vs ADS8361IRHBR)
- Matched internal sample-and-hold eliminates channel-to-channel skew （vs Generic multiplexed 4-channel ADC architectures)
設計ノート
Use a star-ground topology tying AGND, DGND, and the exposed pad (pin 32) together at a single point under the IC. Place a 10 µF X7R ceramic plus a 0.1 µF X7R decoupling pair within 3 mm of each AVDD pin (18, 24, 30) and one similar pair on DVDD (pin 11). Keep the analog input traces matched-length within 0.5 mm so that differential pair skew does not degrade CMRR at the 500 kSPS edge rate.
Route the serial interface (SCLK, DOUT_A, DOUT_B, CS) over a continuous ground reference and keep digital traces away from the analog input pairs. The exposed pad must be soldered to a continuous copper pour with at least 8 thermal vias (0.3 mm drill, 1 mm pitch) to keep junction temperature within the 150°C limit when sampling multiple simultaneously-driven channels. Place a 10 µF + 0.1 µF capacitor at REFP/REFN (pins 1 and 2) to stabilize the internal reference.
Do not drive any analog input above AVDD + 0.3 V or below AGND - 0.3 V; the SAR front-end has no internal clamps and a momentary over-voltage can latch up the converter. Drive CONVST_A and CONVST_B with a clean low-jitter signal; any aperture jitter on these pins translates directly into sampled-data timing error in three-phase current loops. When using daisy-chain mode (TAG pin), assert CS only after the final device in the chain to avoid spurious conversions.
コンプライアンス情報
RoHS-compliant per Texas Instruments product page (G4 lead-free finish). Industrial/automotive temperature grade -40 to +125°C indicated by 'I' ordering code suffix; AEC-Q100 Q1-qualified variant not catalogued under this exact MPN suffix.
