ATSAMA5D22B-CU - 500MHz ARM Cortex-A5 MPU, 196-TFBGA | Microchip
部品番号: ATSAMA5D22B-CU ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $18.75 | $18.75 |
| 10 | $16.92 | $169.20 |
| 100 | $14.55 | $1,455.00 |
| 500 | $12.4 | $6,200.00 |
| 1,000 | $10.75 | $10,750.00 |
ATSAMA5D22B-CU 概要
What is an embedded MPU? An MPU (Microprocessor Unit) integrates a CPU core, memory controller, and a wide range of system peripherals on a single chip, replacing the CPU plus Northbridge/Southbridge of older x86 designs. The SAMA5D2 lineage sits in the Linux-capable MPU tier above microcontroller units (MCUs), competing with NXP i.MX6ULL and TI AM335x in human-machine interface, IoT gateways, and industrial control boards where the workload demands a full operating system rather than bare-metal firmware. The Cortex-A5 core implements the ARMv7-A architecture, which supports virtual memory, symmetric multiprocessing, and the full ARM exception model required by Linux distributions.
Key features of the ATSAMA5D22B-CU include an MMU for full Linux/Android support, ETM/ETB debug tracing, a 16-bit DDR memory controller for LPDDR1/2/3 and DDR2/3/3L, dual QSPI and e.MMC flash interfaces, hardware AES/SHA accelerators, and an integrated LCD controller supporting up to XGA at 60 fps. Peripherals include USB 2.0 high-speed host and device, two HSIC ports, two 10/100 Ethernet MACs with 1588 PTP hardware timestamps, two CAN-FD controllers, and a 12-bit 1 MSPS ADC.
Typical applications cover industrial IoT gateways, smart energy concentrators, building automation panels, medical point-of-care terminals, and human-machine interface panels where the MPU runs Linux and renders LVDS/RGB LCDs. The wide memory compatibility (LPDDR1/2/3 and DDR2/3/3L) gives designers latitude in BOM selection between low-cost DDR3L and high-bandwidth LPDDR3.
When laying out the PCB, allocate a 4-layer minimum stackup with the inner layers as ground and a 3.3 V power plane, follow the package escape guidelines for 0.8 mm pitch BGA, and provide a dedicated 25 MHz crystal with a load capacitor matched to the oscillator stage. Use only RoHS-compliant SAC305 solder and a JEDEC J-STD-020 profile with a peak reflow below 250 C to avoid internal package delamination.
ドロップイン代替品: ATSAMA5D22B-CU — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: ATSAMA5D22B-CU （同一形状・フットプリント） — 相違点: Package, Operating Temperature, CAN, Ethernet, USB.
クイック比較ツール — 並列比較する代替部品を選択:
ATSAMA5D22B-CUR
✅ ドロップイン✓ 在庫あり
$9.1 / 個
データシートを見る →ATSAMA5D22A-CNR
✅ ドロップイン✓ 在庫あり
$10.8 / 個
データシートを見る →ATSAMA5D21B-CU
✅ ドロップイン✓ 在庫あり
$9.8 / 個
データシートを見る →ATSAMA5D22A-CN
✅ ドロップイン✓ 在庫あり
$9.95 / 個
データシートを見る →ATSAMA5D225C-D1M-CU
✅ ドロップイン✓ 在庫あり
$12.6 / 個
データシートを見る →ATSAMA5D22B-CU 最大定格＆電気的特性
| Core Processor | ARM Cortex-A5 (32-bit, single core) |
| Core Architecture | ARMv7-A with TrustZone and NEON |
| Maximum CPU Clock | 500 MHz |
| L1 Instruction Cache | 32 Kbytes |
| L1 Data Cache | 32 Kbytes |
| L2 Cache / SRAM | 128 Kbytes (configurable as internal SRAM) |
| Memory Architecture | MMU (full virtual memory support) |
| External Memory Support | LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L (16-bit) |
| Flash Interfaces | 2x QSPI, e.MMC |
| パッケージ | 196-TFBGA (CSBGA), 11x11 mm, 0.8 mm pitch |
| 実装タイプ | Surface Mount |
| 動作温度 | -40 C to +85 C (industrial) |
| Supply Voltage (core) | 1.2 V (typ, internal regulator) |
| Supply Voltage (I/O) | 3.3 V (typ) |
| RoHS ステータス | Compliant |
ATSAMA5D22B-CU 196-tfbga (csbga), 11x11 mm, 0.8 mm pitch ピン配置ガイド
ATSAMA5D22B-CU (196-tfbga (csbga), 11x11 mm, 0.8 mm pitch パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: ATSAMA5D22B-CU.
詳細は データシート をご参照ください。
主な用途
ATSAMA5D22B-CU の用途: 6 件s: Industrial IoT Gateways, Smart Energy Concentrators, Building Automation Panels, Medical Point-of-Care Terminals, Human-Machine Interface (HMI) Controllers, Connected Printers and Peripherals.
Industrial IoT Gateways
The ATSAMA5D22B-CU is a strong fit for industrial IoT gateways where its 500 MHz Cortex-A5 core runs Linux with full MMU support, and its two 10/100 Ethernet MACs with hardware 1588 PTP timestamping back deterministic Ethernet and time-synchronized fieldbus traffic. Its 16-bit LPDDR3/DDR3L controller keeps BOM cost reasonable while a pair of CAN-FD controllers handle modern industrial vehicles and machinery. Running a Buildroot or Yocto image, the gateway can aggregate Modbus/TCP, EtherCAT, MQTT-SN, and OPC-UA traffic concurrently; the integrated LCD controller also drives a local HMI display for commissioning technicians in the field.
おすすめ
Smart Energy Concentrators
For smart energy and metering concentrator heads, the ATSAMA5D22B-CU delivers the deterministic real-time response of a Cortex-A5 plus the security block (ARM TrustZone, hardware AES/SHA, secure boot) needed for IEC 62443-class meters. Its LPDDR3 controller supports up to 4 Gbytes of RAM for storing minute-level load profiles, while two QSPI buses and e.MMC deliver fast boot and ample room for firmware-over-the-air staging. The 12-bit 1 MSPS ADC and CAN-FD controllers aggregate sensor data from smart meters, while USB 2.0 high-speed with host role provisions local configuration via USB flash during installation.
おすすめ
Building Automation Panels
Building automation HMI panels benefit from the ATSAMA5D22B-CU's integrated TFT LCD controller (up to XGA at 60 fps), which drives a 4-7 inch capacitive touch display without an external graphics controller. The two HSIC ports and USB 2.0 high-speed host expose the panel to RS-485 converters, Modbus dongles, and KNX/TP bridges over the fieldbus, while two CAN-FD controllers handle BACnet and elevator/lift networks. Running a Yocto Linux image with Qt/EGL, design teams can deliver rich touch-based interfaces with the same footprint as a Cortex-A9 panel at lower BOM cost.
おすすめ
Medical Point-of-Care Terminals
The ATSAMA5D22B-CU is well-suited to medical point-of-care terminals requiring IEC 60601-1 isolation and stringent EMC margins. The Cortex-A5 core runs Linux with secure boot and hardware AES, the LCD controller drives the medical display, and the Ethernet MACs implement secured network paths to hospital EMR systems. Its industrial -40 C to +85 C junction rating supports operation in ambulances and field clinics, while LPDDR2/3 with hardware scrambling and TrustZone enables encrypted patient data buffers. The low typical-power profile (around 200 mW at full CPU clock) eases battery-inverter design for portable carts.
おすすめ
Human-Machine Interface (HMI) Controllers
Industrial HMI controllers are a primary target for the ATSAMA5D22B-CU. The integrated TFT LCD controller pairs with the LCD-TFT peripheral to drive XGA/WVGA panels directly, while the SD/MMC host plus e.MMC store animated Qt/QML UX assets. Hardware crypto and TrustZone protect configuration and recipes, while the two CAN-FD and two 10/100 Ethernet MACs deliver deterministic networking. Designers benefit from the smaller BGA and lower cost than the SAMA5D27 dual-core parts without sacrificing the rich Linux ecosystem. Touch-panel interfaces and audio playback are handled by I2S and SSC peripherals.
おすすめ
Connected Printers and Peripherals
Connected office peripherals such as networked printers, label applicators, and document scanners benefit from the ATSAMA5D22B-CU's mix of Cortex-A5 compute, large DDR memory bandwidth, and high-speed USB 2.0 host. The integrated LCD controller drives the operator panel, while two Ethernet MACs support LAN and dedicated service ports. Secure boot via TrustZone plus AES/SHA accelerators is suitable for protected firmware storage per modern enterprise IT policies. The 196-TFBGA footprint (11x11 mm) keeps the SoM small enough for compact printer controller boards.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ATSAMA5D22B-CU — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ATSAMA5D22B-CUR | ATSAMA5D22A-CNR | ATSAMA5D21B-CU | ATSAMA5D22A-CN | ATSAMA5D225C-D1M-CU |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 196-TFBGA (11x11 mm) | 196-TFBGA (11x11 mm) | 196-TFBGA (11x11 mm) | 196-TFBGA (11x11 mm) | 196-TFBGA (11x11 mm) | 196-TFBGA (11x11 mm) |
| Core | ARM Cortex-A5 (1 core) | ARM Cortex-A5 (1 core) | ARM Cortex-A5 (1 core) | ARM Cortex-A5 (1 core) | ARM Cortex-A5 (1 core) | ARM Cortex-A5 (1 core) |
| Maximum Frequency | 500 MHz | 500 MHz | 500 MHz | 500 MHz | 500 MHz | 500 MHz |
| L2 Cache / SRAM | 128 Kbytes | 128 Kbytes | 128 Kbytes | 128 Kbytes | 128 Kbytes | 128 Kbytes |
| DDR Memory Support | LPDDR1/2/3, DDR2/3/3L 16-bit | LPDDR1/2/3, DDR2/3/3L 16-bit | LPDDR1/2/3, DDR2/3/3L 16-bit | LPDDR1/2/3, DDR2/3/3L 16-bit | LPDDR1/2/3, DDR2/3/3L 16-bit | LPDDR1/2/3, DDR2/3/3L 16-bit |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Lifecycle Status | Active | Active | Active | Active | Obsolete (per ICD) | Active |
主な差別化要因
- Single-drop-in BGA footprint with multiple silicon revisions （vs ATSAMA5D22A-CNR)
- Lower power compared to dual-core SAMA5D27 （vs ATSAMA5D27C-D1G-CU)
- Wide external memory compatibility （vs ATSAMA5D21B-CU)
設計ノート
Estimated: For the 196-TFBGA with 0.8 mm pitch, plan a 4-layer PCB minimum with ground and a 3.3 V power plane on layers 2 and 3. Inner microvia stackups (laser-drilled) help escape the inner-row BGA balls; outer traces should follow the Microchip-recommended ball escape diagram in the SAMA5D2 hardware design package. Keep high-speed DDR traces length-matched within 25 mil tolerance and pair them with proper termination resistors on the DDR signals.
The SAMA5D2 integrates a power management controller that derives core (1.2 V) from the 3.3 V supply; bypass per the reference design uses a 22 uF + 100 nF + 10 nF capacitor ladder on each rail. Place the buck/linear regulators' sense lines as close to the BGA balls as possible and avoid sharing analog/digital ground returns under the package. Add TVS diodes on the USB and HSIC lines to meet industrial surge requirements (IEC 61000-4-2).
Estimated: at full CPU clock and DDR3L activity, the typical power consumption is around 200 mW; however, in fixed-aperture enclosures plan for up to 1 W peak. Use a copper-pour thermal relief under the BGA thermal pad connected to a 4-layer ground stack, and consider a small heatsink when junction temperatures exceed 70 C ambient, especially in sealed enclosures.
Do not skip the 25 MHz external crystal load-capacitor calculation; wrong values shift the DDR PLL and the GMAC 1588 PTP reference, breaking network synchronisation. Always validate boot-mode strap resistors at J20xx/J21xx against the SAMA5D2 boot configuration table before laying out; otherwise the device may default to a UART-only boot and brick in production. Plan for the secure-boot register programming at the factory because TrustZone fuses cannot be reverted in the field.
Estimated: Place decoupling capacitors on the BGA-side of every ball-to-trace via, targeting 0.1 uF high-frequency parts within 100 mils of the balls. Use a continuous reference plane for all DDR traces and avoid crossing plane splits to prevent return-path discontinuities. Route the two 10/100 Ethernet MDI pairs as 100-ohm differential with ground-coplanar reference; route length matching within 5 mil. The LCD parallel interface traces should be kept short with series damping resistors at the driver.
コンプライアンス情報
RoHS and REACH compliance per Microchip product page. AEC-Q100 is not applicable (MPU without automotive qualification status). Conflict-mineral statement available from Microchip corporate compliance.
