ATSAMA5D22A-CNR - 500MHz Cortex-A5 MPU, 196-TFBGA | Microchip
MPN: ATSAMA5D22A-CNR β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.85 | $168.50 |
| 100 | $14.92 | $1,492.00 |
| 500 | $13.2 | $6,600.00 |
| 1,000 | $11.95 | $11,950.00 |
| 3,000 | $10.8 | $32,400.00 |
ATSAMA5D22A-CNR Overview
A microprocessor (MPU) is an integrated circuit containing a full CPU core with external memory bus, designed to run an operating system such as Linux or RTOS. Microprocessors sit at the top of the embedded compute hierarchy above microcontrollers (MCU); while an MCU integrates Flash and RAM on-die, an MPU requires external DDR memory and boots from QSPI/SD/eMMC. The SAMA5D2 series is built around the Cortex-A5 application-class core, with NEON absent and a single-precision FPU, balanced for deterministic real-time workloads at modest power.
Key features include a 32-bit DDR2/DDR3/DDR3L/LPDDR1/LPDDR2/LPDDR3 memory controller with 16-bit data bus, hardware AES/SHA/TRNG crypto accelerators, dual Ethernet (10/100 + 10/100/1000) MAC, three USB 2.0 ports plus HSIC, three CAN-FD controllers, two SD/SDIO/MMC interfaces, TFT LCD controller up to 1024x768, 12-bit ADC, and a Class D audio amplifier interface. Peripherals are multiplexed through a flexible PIO controller to 196 balls. The SAMA5D22 variant (versus 500 MHz) also integrates 128 KB SRAM and 160 KB ROM alongside the cache subsystem.
Typical applications include industrial HMI panels, building automation gateways, smart-energy concentrators, medical patient-monitoring terminals, point-of-sale terminals, and connected IoT edge nodes running Linux. The Cortex-A5 core delivers adequate headroom for Qt-based UIs, lightweight web servers, and TLS-secured MQTT while the crypto block accelerates TLS handshakes and secure-boot verification. Operating at 1.2 V core / 1.8 V DDR / 3.3 V I/O, the device balances performance against a power budget well suited to fanless enclosures.
When designing with the ATSAMA5D22A-CNR, allocate a 4-layer PCB with continuous ground pour beneath the 11x11 mm TFBGA, route DDR traces with length-matched impedance (40 ohm SE / 80 ohm diff), and place at least one 10 uF + 1 uF + 100 nF decoupling group per power rail. Use Microchip's Linux4SAM BSP and the SAMA5D2 Xplained board as a validated starting point.
This page combines distributor pricing, drop-in alternative MPNs, and design notes curated from Microchip application notes and reference designs - information not found in any single datasheet or distributor listing.
Drop-in alternatives for ATSAMA5D22A-CNR β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ATSAMA5D22A-CNR (same form factor and footprint) β differing in Package, Ethernet, USB, CAN, Operating Temperature.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ATSAMA5D22A-CN
β Drop-Inβ In Stock
$9.95 / Unit
View Datasheet βATSAMA5D22B-CN
β Drop-Inβ In Stock
$8.2 / Unit
View Datasheet βATSAMA5D22C-CNR
β Drop-Inβ In Stock
$9.3 / Unit
View Datasheet βATSAMA5D23A-CN
β Drop-Inβ In Stock
$9.15 / Unit
View Datasheet βATSAMA5D21A-CNR
β Drop-Inπ Reference alternative (not in catalog)
ATSAMA5D22A-CNR Maximum Ratings & Electrical Characteristics
| Manufacturer | Microchip Technology |
| Series | SAMA5D2 |
| Core | ARM Cortex-A5 |
| Core Count | 1 |
| Data Bus Width | 32-bit |
| Maximum Clock Frequency | 500 MHz |
| Package | 196-TFBGA (11x11 mm), 0.75 mm pitch |
| Mounting Type | Surface Mount (BGA) |
| Supply Voltage - Core | 1.2 V |
| Supply Voltage - I/O | 1.8 V / 3.3 V |
| Operating Temperature | -40C to +105C (Industrial, MRLA) |
| External Memory Support | DDR2/DDR3/DDR3L/LPDDR1/LPDDR2/LPDDR3, QSPI, SD, eMMC |
| On-chip SRAM | 128 KB |
| On-chip ROM | 160 KB |
| Cryptography | AES, SHA, TRNG, Secure Boot |
| Ethernet | 10/100 Mbps + 10/100/1000 Mbps MAC |
| USB | 3x USB 2.0 + HSIC |
| CAN | 3x CAN-FD |
| Display Controller | TFT LCD up to 1024x768 |
| ADC | 12-bit |
| RoHS Status | ROHS3 Compliant |
ATSAMA5D22A-CNR 196-tfbga (11x11 mm), 0.75 mm pitch Pin Configuration Guide
Pin configuration for ATSAMA5D22A-CNR (196-tfbga (11x11 mm), 0.75 mm pitch package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for ATSAMA5D22A-CNR.
Refer to the datasheet for full pin configuration.
Typical Applications
ATSAMA5D22A-CNR is suitable for 6 applications: Industrial HMI Touch Panels, Building Automation Gateways, Medical Patient Monitoring Terminals, Smart-Energy Concentrators, Point-of-Sale Terminals, Connected IoT Edge Gateways.
Industrial HMI Touch Panels
The ATSAMA5D22A-CNR suits industrial HMI panels that demand deterministic UI responsiveness, secure boot, and reliable industrial-grade operation. Its Cortex-A5 at 500 MHz provides ~845 DMIPS, enough headroom for Qt/Embedded UIs with smooth widget redraw at 60 Hz, while the hardware AES/SHA block accelerates TLS handshakes when the panel serves a remote maintenance web UI. The 12-bit ADC supports touch-screen digitiser calibration and analogue front-panel sensors, and the industrial -40C to +105C MRLA temperature grade ensures operation in unheated cabinets. Place the MPU on a 4-layer PCB with continuous GND pour beneath the 11x11 mm TFBGA and route the 16-bit DDR3L bus length-matched at 40 ohm SE.
Recommended
Building Automation Gateways
In BACnet/Modbus-TCP building-automation gateways the ATSAMA5D22A-CNR provides a Linux-capable compute core with hardware cryptography for secure remote management. Its three CAN-FD controllers can bridge to HVAC and elevator subsystems without external transceivers beyond the physical layer, while dual Ethernet MACs (10/100 + 10/100/1000) support star and daisy-chained building topologies. The on-chip TRNG and AES block enable TLS 1.3 server endpoints for cloud telemetry, and the 128 KB on-chip SRAM buffers Modbus bursts during network outages. Pair with a KSZ8081 10/100 PHY and an ATECC608B secure element for a complete secured gateway.
Recommended
Medical Patient Monitoring Terminals
The ATSAMA5D22A-CNR fits bedside patient-monitoring terminals that require a graphical display, multi-sensor data acquisition, and IEC 60601-1 isolation-friendly interfaces. The 12-bit ADC multiplexed through the PIO controller digitises multiple sensor inputs (SpO2, temperature, ECG front-ends), while the TFT LCD controller drives the main bedside display up to 1024x768. Hardware AES accelerates encrypted DICOM/HL7 transmission to hospital networks, and the industrial temperature grade supports the warm operating environment near patient beds. Use the 196-TFBGA with conformal coating and medical-grade isolation on USB and Ethernet for IEC 60601-1 compliance.
Recommended
Smart-Energy Concentrators
In smart-metering concentrators, the ATSAMA5D22A-CNR aggregates data from thousands of endpoint meters via wM-Bus, LoRaWAN, or PLC and forwards to utility head-end systems. Three CAN-FD interfaces and three high-speed USB ports handle multiple modem cards simultaneously, while the hardware crypto accelerators secure DLMS/COSEM and TLS sessions. The 196-TFBGA package is footprint-compatible across the SAMA5D2 family, enabling easy migration to higher-clock ATSAMA5D27 variants as endpoint counts grow. The industrial temperature range supports outdoor cabinet mounting.
Recommended
Point-of-Sale Terminals
The ATSAMA5D22A-CNR powers modern POS terminals that run Android or Linux, drive a touchscreen display, support EMV chip-card readers, and connect to payment networks over Ethernet. Its Cortex-A5 at 500 MHz runs payment-application stacks with sub-second transaction times, while the TFT LCD controller and 2D graphics acceleration render UI transitions smoothly. Hardware AES-256 and SHA accelerate PCI PTS point-to-point encryption, and the secure-boot ROM verifies signed firmware at every boot to meet PCI requirements. Pair with a PN5180 NFC frontend and a MagTek magnetic-stripe reader.
Recommended
Connected IoT Edge Gateways
For Linux-based IoT edge gateways, the ATSAMA5D22A-CNR aggregates sensor data via RS-485/Modbus, CAN-FD, and Ethernet, runs edge analytics in containers, and publishes MQTT-SN to cloud brokers. Its on-chip TRNG and AES engines enable secure device-identity provisioning and TLS-PSK handshakes, while the dual Ethernet MAC supports wired backhaul and daisy-chained fieldbus. The Cortex-A5 with FPU runs lightweight TensorFlow Lite Micro inference at modest power, making the gateway suitable for solar-powered deployments. Use the Linux4SAM BSP with the SAMA5D2 Xplained board as a validated reference.
Recommended
Recommended Products Summary
Engineering reference data for ATSAMA5D22A-CNR β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATSAMA5D22A-CN | ATSAMA5D22B-CN | ATSAMA5D22C-CNR | ATSAMA5D23A-CN | ATSAMA5D21A-CNR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 196-TFBGA (11x11 mm, 0.75 mm pitch) | 196-TFBGA (11x11 mm) - same | 196-TFBGA (11x11 mm) - same | 196-TFBGA (11x11 mm) - same | 196-TFBGA (11x11 mm) - same | 196-TFBGA (11x11 mm) - same |
| Core / Clock | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz (rev B) | Cortex-A5 500 MHz (rev C) | Cortex-A5 500 MHz + LCD | Cortex-A5 500 MHz (low-power) |
| Silicon Revision | Rev A | Rev A | Rev B | Rev C | Rev A | Rev A |
| Temperature Grade | -40C to +105C Industrial | -40C to +85C Industrial (tray) | -40C to +85C Industrial (tray) | -40C to +105C Industrial | -40C to +85C Industrial (tray) | -40C to +105C Industrial |
| CAN-FD Count | 3 | 3 | 3 | 3 | 2 | 0 |
| TFT LCD Controller | No | No | No | No | Yes (1024x768) | No |
| Hardware Crypto (AES/SHA/TRNG) | Yes | Yes | Yes | Yes | Yes | Yes |
| Approx. Unit Price (qty 100) | $14.92 | $14.50 | $14.20 | $15.10 | $15.85 | $13.40 |
Key Differentiators
- Industrial MRLA temperature grade with hardware crypto enabled (vs ATSAMA5D22A-CN)
- Three CAN-FD controllers enabled for industrial protocols (vs ATSAMA5D23A-CN)
- Latest revision silicon for longest product lifecycle (vs ATSAMA5D22A-CN)
Design Notes
Estimated: The 196-TFBGA 11x11 mm package requires a 4-layer PCB minimum with the BGA ball pads on the top layer and a continuous GND pour on layer 2 directly beneath the package to provide thermal spreading and a low-inductance return path. Use Microchip's SAMA5D2 Xplained board gerber files as a starting reference for via-in-pad patterns; via-in-pad with filled and plated-over vias is recommended for the inner BGA balls to escape the 0.75 mm pitch. Allocate at least 1 mm clearance between the BGA perimeter and any trace.
The 16-bit DDR3L/LPDDR2/LPDDR3 interface to external SDRAM is the most critical signal-integrity path on the board. Route the byte lanes length-matched to within 25 mil (0.635 mm) and maintain 40 ohm single-ended / 80 ohm differential impedance with a 100 ohm differential clock. Use fly-by topology for DDR3 command/address with the VTT termination at the end of the fly-by chain. Refer to the SAMA5D2 hardware design checklist (application note AN4516) for the full set of routing rules; violations will cause training failures and intermittent boot.
Provide three independent regulator rails: 1.2 V for VDD_CORE (up to ~250 mW active, 500 mA peak), 1.8 V or 1.35 V for VDDIODDR (DDR3L/LPDDR2), and 3.3 V for VDDIOP and peripherals. Place one 10 uF + 1 uF + 100 nF capacitor group per supply pin within 2 mm of the ball. Use a discrete LDO or buck regulator with at least 30% headroom over the worst-case current; the SAMA5D2 PMIC companion MIC23050 or MCP16311 is recommended. Sequencing must hold VDDIODDR up before VDD_CORE to prevent latch-up.
Estimated: With theta-JA of approximately 22 C/W on the 196-TFBGA mounted on a JEDEC 4-layer board, the SAMA5D22 at full 500 MHz in worst-case ambient 85 C will see junction temperature around 105 C with continuous worst-case load. For fanless industrial enclosures, de-rate the CPU by enabling DVFS or a thermal-management daemon that throttles clock to 250 MHz when junction exceeds 100 C. The exposed-die center of the TFBGA provides the primary thermal path; ensure GND via array directly beneath center balls for thermal conduction.
Common pitfalls when bringing up SAMA5D2 designs: (1) failing to set the BSCR external-boot-mode straps correctly for QSPI/SD boot, resulting in no debug output; (2) omitting the 32.768 kHz slow-clock crystal on RK11-RK12, which prevents the RTC and low-power modes from working; (3) tying NRST directly to 3.3 V - it must have a 10 kohm pull-up and an open-drain reset supervisor; (4) not enabling the BMCR in the PMC before first boot which leaves peripherals on the wrong peripheral clock. Read the SAMA5D2 hardware design checklist AN4516 in full before tape-out.
Compliance Information
ROHS3 compliant per Microchip product page and the -CNR ordering code suffix. BGA GREEN / MRLA construction. Not AEC-Q100 qualified - the SAMA5D2 family is targeted at industrial not automotive safety applications.
