ATSAMA5D22B-CUR - ARM Cortex-A5 500MHz MPU, 196-TFBGA | Microchip
部品番号: ATSAMA5D22B-CUR ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $13.72 | $13.72 |
| 10 | $12.35 | $123.50 |
| 100 | $10.98 | $1,098.00 |
| 500 | $9.86 | $4,930.00 |
| 1,000 | $9.1 | $9,100.00 |
ATSAMA5D22B-CUR 概要
Key features include a 32-bit DDR2/LPDDR/LPDDR2/DDR3 (DDR3L) memory controller with 16-bit data bus, 24-bit LCD controller with overlays, 2D graphics accelerator, hardware video decoder (H.264, MPEG-4, VP8, JPEG), and a comprehensive peripheral set including Gigabit Ethernet with IEEE 1588, dual CAN-FD, USB 2.0 HS host and device, and multiple UART/SPI/I2C interfaces. An ARM TrustZone secure boot and cryptographic accelerator (AES, SHA, TRNG) support secure connected applications.
Typical applications include industrial automation HMI panels, building control gateways, IoT edge nodes, smart energy concentrators, point-of-sale terminals, and low-power portable medical devices. The combination of Cortex-A5 compute performance, integrated display controller, and rich connectivity eliminates the need for external companion ICs in many designs.
The SAMA5D2 silicon family is built on a 65 nm low-power CMOS process, with deep-sleep current under 5 uA and a dedicated backup memory retention mode that allows RTC wake from coin-cell backup while the main SoC rails are off, enabling years-long battery standby for always-on sensing products.
When designing with this device, plan for an external 32.768 kHz crystal and a 12 MHz main oscillator; the integrated DDR controller requires matched trace lengths and proper decoupling. The 196-TFBGA has a 0.75 mm pitch - a 4-layer PCB with microvia stack-ups is recommended for the power and ground planes to maintain signal integrity on the DDR interface.
This page synthesizes Microchip datasheet specifications, real-time distributor pricing, drop-in alternative inventory, and PCB-level design considerations not consolidated on any single component page elsewhere on the web.
ドロップイン代替品: ATSAMA5D22B-CUR — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: ATSAMA5D22B-CUR （同一形状・フットプリント） — 相違点: Package, USB, Ethernet, Operating Temperature, External Memory Support.
クイック比較ツール — 並列比較する代替部品を選択:
ATSAMA5D225C-D1M-CU
✅ ドロップイン✓ 在庫あり
$12.6 / 個
データシートを見る →ATSAMA5D21B-CU
✅ ドロップイン✓ 在庫あり
$9.8 / 個
データシートを見る →ATSAMA5D21C-CUR
✅ ドロップイン✓ 在庫あり
$11.65 / 個
データシートを見る →ATSAMA5D22A-CN
✅ ドロップイン✓ 在庫あり
$9.95 / 個
データシートを見る →ATSAMA5D22A-CNR
✅ ドロップイン✓ 在庫あり
$10.8 / 個
データシートを見る →ATSAMA5D22B-CUR 最大定格＆電気的特性
| Core Architecture | ARM Cortex-A5 (32-bit, single-core) |
| Maximum CPU Clock | 500 MHz |
| L1 Instruction Cache | 128 Kbyte |
| L1 Data Cache | 128 Kbyte |
| L2 Cache | 32 Kbyte |
| NEON Media Engine | Yes (NEON MPE) |
| Floating Point Unit | VFPv4-D32 (single and double precision) |
| External Memory Controller | 16-bit DDR2/LPDDR/LPDDR2/DDR3(L) |
| Display Controller | 24-bit LCD with overlays, 2D graphics accelerator |
| Video Decoder | H.264 / MPEG-4 / VP8 / JPEG hardware decode |
| Ethernet | 10/100/1000 Mbps with IEEE 1588 |
| USB | USB 2.0 High-Speed Host and Device |
| CAN | 2x CAN-FD |
| Crypto Accelerator | AES, SHA, TRNG; ARM TrustZone secure boot |
| 電源電圧 | 0.9 V core / 1.8 V / 3.3 V I/O (typical) |
| Operating Temperature (Industrial) | -40C to +85C |
| パッケージ | 196-TFBGA, 11x11 mm, 0.75 mm pitch |
| 実装タイプ | Surface Mount |
| MSLレベル | 3 (per JEDEC J-STD-020) |
| RoHS ステータス | Compliant |
| Deep-Sleep Current | <5 uA with backup self-refresh |
ATSAMA5D22B-CUR 196-tfbga, 11x11 mm, 0.75 mm pitch ピン配置ガイド
ATSAMA5D22B-CUR (196-tfbga, 11x11 mm, 0.75 mm pitch パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: ATSAMA5D22B-CUR.
詳細は データシート をご参照ください。
主な用途
ATSAMA5D22B-CUR の用途: 7 件s: Industrial HMI Touch Panels, Building Automation Gateways, IoT Edge Sensor Hubs, Smart Energy Concentrators, Point-of-Sale Terminals, Portable Medical Devices, Industrial Printing and Labeling.
Industrial HMI Touch Panels
The ATSAMA5D22B-CUR drives 24-bit color LCD touch panels up to 1280x800 in industrial operator interfaces, with its integrated 2D graphics accelerator handling GUI composition while the 500 MHz Cortex-A5 core runs Qt or LVGL application stacks. The hardware H.264/MPEG-4 decoder offloads instructional video playback, and the dual CAN-FD interfaces connect to PLC backplanes. The 196-TFBGA's 0.75 mm pitch allows the SoC plus DDR and PMIC to fit beneath a 5-inch display PCB, while -40C to +85C operation tolerates factory-floor enclosures.
おすすめ
Building Automation Gateways
In BACnet, KNX, or Modbus building controllers, the ATSAMA5D22B-CUR serves as the central processor aggregating HVAC, lighting, and access-control subsystems over RS-485, CAN, and Ethernet. Its Gigabit Ethernet with IEEE 1588 timestamping enables synchronized HVAC control loops across distributed zones, while ARM TrustZone with hardware AES/SHA secures cloud uplinks. Deep-sleep under 5 uA lets the gateway enter ultra-low-power standby during unoccupied hours, waking on RTC or Ethernet magic packet without rebooting the application stack.
おすすめ
IoT Edge Sensor Hubs
Battery-powered edge aggregators leverage the ATSAMA5D22B-CUR's sub-5 uA deep-sleep to spend most of their life asleep, waking on a sensor interrupt to capture data, run anomaly detection on the Cortex-A5, and report via Wi-Fi or LoRa. The on-chip crypto accelerators authenticate MQTT-over-TLS messages to AWS IoT or Azure IoT Hub with minimal CPU overhead. USB 2.0 HS device mode supports local configuration from a host PC without an external PHY, and dual CAN-FD ports aggregate automotive or industrial CAN bus sensor clusters.
おすすめ
Smart Energy Concentrators
Utility smart-meter data concentrators use the ATSAMA5D22B-CUR to aggregate DLMS/COSEM or IEC 61850 readings from hundreds of endpoints over RS-485 and Ethernet, buffering to removable storage and forwarding to head-end systems. The 32 Kbyte L2 cache plus NEON engine accelerates encryption of meter telemetry before upload, while hardware TRNG seeds device-specific keys. Industrial temperature rating and on-chip RTC with backup battery domain support outdoor cabinet deployment with 10+ year product life expectations.
おすすめ
Point-of-Sale Terminals
POS terminals benefit from the ATSAMA5D22B-CUR's combination of a Cortex-A5 core for transaction processing, a 24-bit LCD controller for the cashier display, and a hardware H.264 decoder for digital signage loops. The dual CAN-FD ports interface with retail scanner towers, while USB 2.0 HS host supports magnetic-stripe readers and NFC payment modules. ARM TrustZone isolates payment-card processing from general application logic, helping meet PCI PTS 5.x requirements without an external secure element for low-end terminals.
おすすめ
Portable Medical Devices
Patient monitors, infusion pumps, and portable diagnostic imagers leverage the ATSAMA5D22B-CUR's low deep-sleep current to extend battery runtime across multi-shift clinical workflows, while the on-chip LCD controller drives bedside displays and the hardware video decoder renders ultrasound or endoscopic video. ARM TrustZone plus the integrated AES/SHA accelerators protect HIPAA-relevant patient data at rest and in transit. The 196-TFBGA industrial temperature range supports both clinical indoor use and field emergency-response deployments.
おすすめ
Industrial Printing and Labeling
Industrial label printers and small-format industrial printers use the ATSAMA5D22B-CUR to drive the print engine over USB or Ethernet while rendering high-resolution graphics on a 24-bit LCD front panel. The 2D graphics accelerator and NEON engine handle ZPL/EPL rasterization and barcode generation at high speed. Dual CAN-FD interfaces coordinate with downstream cutter and applicator modules on the packaging line, while the industrial temperature rating supports factory ambient up to +85C without active cooling.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ATSAMA5D22B-CUR — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ATSAMA5D225C-D1M-CU | ATSAMA5D21B-CU | ATSAMA5D21C-CUR | ATSAMA5D22A-CN | ATSAMA5D22A-CNR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 196-TFBGA (11x11) | 196-TFBGA (11x11) - same | 196-TFBGA (11x11) - same | 196-TFBGA (11x11) - same | 196-TFBGA (11x11) - same | 196-TFBGA (11x11) - same |
| Core | Cortex-A5 500 MHz | Cortex-A5 500 MHz (rev C) | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz (rev A) | Cortex-A5 500 MHz (rev A) |
| Hardware Video Decoder | Yes (H.264/MPEG-4/VP8/JPEG) | Yes (H.264/MPEG-4/VP8/JPEG) | No | No | Yes (H.264/MPEG-4/VP8/JPEG) | Yes (H.264/MPEG-4/VP8/JPEG) |
| Ethernet Speed | 10/100/1000 Mbps + IEEE 1588 | 10/100/1000 Mbps + IEEE 1588 | 10/100 Mbps | 10/100 Mbps | 10/100/1000 Mbps + IEEE 1588 | 10/100/1000 Mbps + IEEE 1588 |
| CAN-FD Ports | 2 | 2 | 1 | 1 | 2 | 2 |
| 2D Graphics Accelerator | Yes | Yes | No | No | Yes | Yes |
| TrustZone + Crypto | Yes (AES/SHA/TRNG) | Yes (enhanced crypto) | Yes (AES/SHA/TRNG) | Yes (AES/SHA/TRNG) | Yes (AES/SHA/TRNG) | Yes (AES/SHA/TRNG) |
| Silicon Revision | B (production) | C (latest) | B | C | A (legacy) | A (legacy) |
主な差別化要因
- Hardware H.264 video decoder on-chip （vs ATSAMA5D21B-CU)
- Gigabit Ethernet with IEEE 1588 TSN （vs ATSAMA5D21B-CU)
- Latest production silicon revision B （vs ATSAMA5D22A-CN)
設計ノート
The ATSAMA5D22B-CUR requires three main rails: VDDCORE (0.9V typical, up to ~1A under load), VDDIO (3.3V or 1.8V selectable), and VDDBU (backup domain, typically 1.8V from coin cell). Use a power-management IC such as the MIC28511 or LP3907 with proper sequencing - VDDCORE must ramp before VDDBU per the Microchip SAMA5D2 hardware design checklist. Decoupling requires at minimum 10x 100nF X7R plus 4x 10uF X5R per rail, placed within 5 mm of the supply balls.
The 196-TFBGA package uses a 0.75 mm ball pitch, requiring 4-layer PCB with laser-drilled microvias on the inner pads to break out the inner-row balls. Reference the Microchip SAMA5D2-XULT evaluation board gerbers for trace-routing guidance. Maintain 50 ohm single-ended and 100 ohm differential impedance on DDR traces; maximum length mismatch of 25 mil between byte lanes is mandatory for proper DDR3L operation at 533 MHz.
Estimated: at 500 MHz full CPU load with both CAN-FD and GbE active, the ATSAMA5D22B-CUR dissipates approximately 1.5 W from the core rail. The 196-TFBGA has theta_JA around 25 C/W on a 4-layer JEDEC test board, yielding a junction temperature rise of about 37 C above ambient. In a sealed industrial enclosure with no airflow, derate ambient by 15-20 C to stay within the +85C operating limit. Adding thermal vias under the central BGA ball grid improves heat spreading.
Do not omit the 32.768 kHz low-frequency crystal on the SAMA5D2 - the RTC and deep-sleep wake logic depend on it. The boot configuration pins (BMS, JTAGSEL, DISABLE_RST) must be pulled correctly at reset or the part will not boot from the intended memory. Secure boot requires the BSCR register to be programmed before JTAG is locked - test your secure-boot flow with a development fuse setting before committing to production fuses.
コンプライアンス情報
RoHS and REACH compliance per Microchip product declarations. AEC-Q100 automotive qualification not applicable for this industrial-grade MPU; for automotive, see SAMA5D2 automotive variants. Halogen-free status not explicitly stated in the verified web data.
