MT28F800B3WG-10T - 8Mb NOR Flash, 100ns, 48-TSOP | Micron
部品番号: MT28F800B3WG-10T ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $8.5 | $8.50 |
| 10 | $7.65 | $76.50 |
| 100 | $6.8 | $680.00 |
| 500 | $6.05 | $3,025.00 |
| 1,000 | $5.35 | $5,350.00 |
MT28F800B3WG-10T 概要
NOR flash is a non-volatile memory category that retains data without power and supports random read access at byte/word granularity, sitting at the top of the boot-code/ROM hierarchy that spans mask ROM, NOR, NAND, and managed NAND. Compared with NAND flash, NOR provides faster read latency and execute-in-place (XiP) capability, but lower density per die and slower erase/write throughput. The MT28F800B3WG family operates from a single 3.3 V VCC supply (2.7 V-3.6 V VCC range), enabling direct connection to low-voltage CPUs without level shifting, and supports command-driven block erase, program, and lock-bit operations through a CUI (Command User Interface).
Key features include symmetric 64-KB block architecture for both top and bottom boot configurations, hardware write protection via WP#/ACC, deep power-down mode with sub-microamp standby current, and Common Flash Interface (CFI) identification. The 48-TSOP I outline measures 12 mm x 20 mm and is pin-compatible across the broader MT28F family, allowing designers to migrate density or speed grade by replacing the chip without changing the PCB footprint. Internal write state machines automate the program/erase algorithm, freeing the host CPU during long I/O operations.
Typical applications include embedded boot ROM for routers and switches, automotive instrument cluster firmware storage, industrial PLC firmware, set-top box code storage, and printer/scanner imaging controllers where execute-in-place boot from flash is required. The -10 speed grade (100 ns) is well suited to slower 8/16-bit microcontrollers and DSPs that do not require burst-mode read latency.
When designing with this part, ensure VCC decoupling uses 0.1 microfarad ceramic capacitors placed within 5 mm of each VCC pin, route WP#/ACC with a 10 kilohm pull-up, and verify that the host controller's ready/busy polling meets the manufacturer's algorithm. Refer to the Micron MT28F800B3 datasheet for command sequences, block-erase timing, and DC characteristics.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
ドロップイン代替品: MT28F800B3WG-10T — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
MT28F800B3WG-9T
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MT28F800B3WG-10B
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MT28F800B3WG-10TD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MT28F800B3WG-10T 最大定格＆電気的特性
| メモリタイプ | Non-Volatile, NOR Flash |
| メモリサイズ | 8 Mbit (524288 words x 16 / 1048576 bytes x 8) |
| Memory Organization | x16/x8 selectable |
| Access Time | 100 ns (speed grade -10) |
| Supply Voltage VCC | 2.7 V to 3.6 V (3.3 V typical) |
| インターフェースタイプ | Parallel |
| Block Size | 64 KB symmetric blocks |
| Program/Erase Method | Command-driven via CUI |
| Write Protection | WP#/ACC hardware pin |
| 動作温度 | -40C to +85C (industrial) |
| パッケージ | 48-pin TSOP Type I |
| 実装タイプ | Surface Mount |
| Packaging | Tape and Reel (T suffix) |
| CFI Compliance | Yes (Common Flash Interface) |
MT28F800B3WG-10T ピン構成
| ピン 1 | NC — Not connected (per datasheet) |
| ピン 2 | BYTE# — Selects x8 (low) or x16 (high) data bus width |
| ピン 3 | A17 — Address input 17 |
| ピン 4 | A18 — Address input 18 |
| ピン 5 | A19 — Address input 19 |
| ピン 6 | A20 — Address input 20 |
| ピン 7 | A21 — Address input 21 |
| ピン 8 | WP#/ACC — Write protect / accelerated program pin |
| ピン 9 | RP# — Reset / power-down pin |
| ピン 10 | VPP — Program/erase supply (tie to VCC if unused) |
| ピン 11 | NC — Not connected (per datasheet) |
| ピン 12 | DQ15/A-1 — Data bit 15 / LSB address in x8 mode |
| ピン 13 | DQ7 — Data bit 7 |
| ピン 14 | DQ14 — Data bit 14 |
| ピン 15 | DQ6 — Data bit 6 |
| ピン 16 | DQ13 — Data bit 13 |
| ピン 17 | DQ5 — Data bit 5 |
| ピン 18 | DQ12 — Data bit 12 |
| ピン 19 | DQ4 — Data bit 4 |
| ピン 20 | DQ11 — Data bit 11 |
| ピン 21 | VSS — Ground |
| ピン 22 | DQ3 — Data bit 3 |
| ピン 23 | DQ10 — Data bit 10 |
| ピン 24 | DQ2 — Data bit 2 |
| ピン 25 | DQ9 — Data bit 9 |
| ピン 26 | DQ1 — Data bit 1 |
| ピン 27 | NC — Not connected (per datasheet) |
| ピン 28 | DQ8 — Data bit 8 |
| ピン 29 | DQ0 — Data bit 0 |
| ピン 30 | OE# — Output enable (active low) |
| ピン 31 | DQ14 — Data bit 14 (alternate location) |
| ピン 32 | VSS — Ground |
| ピン 33 | WE# — Write enable (active low) |
| ピン 34 | A0 — Address input 0 |
| ピン 35 | A1 — Address input 1 |
| ピン 36 | A2 — Address input 2 |
| ピン 37 | A3 — Address input 3 |
| ピン 38 | A4 — Address input 4 |
| ピン 39 | A5 — Address input 5 |
| ピン 40 | A6 — Address input 6 |
| ピン 41 | A7 — Address input 7 |
| ピン 42 | A8 — Address input 8 |
| ピン 43 | A9 — Address input 9 |
| ピン 44 | A10 — Address input 10 |
| ピン 45 | A11 — Address input 11 |
| ピン 46 | A12 — Address input 12 |
| ピン 47 | A13 — Address input 13 |
| ピン 48 | A14 — Address input 14 |
主な用途
MT28F800B3WG-10T の用途: 6 件s: Embedded Boot ROM Storage, Industrial PLC Firmware Storage, Automotive Instrument Cluster Firmware, Set-Top Box Code Storage, Printer and Scanner Imaging Controllers, Legacy Telecom Line Card Firmware.
Embedded Boot ROM Storage
The MT28F800B3WG-10T serves as boot code storage in routers, switches, and IP cameras where execute-in-place (XiP) from parallel NOR flash is required. The 8 Mbit density fits bootloader plus a small RTOS image, while the 100 ns access time allows direct CPU fetch at clock rates up to 40 MHz without wait states. The 48-TSOP I footprint is shared across the MT28F family, enabling density migration.
おすすめ
Industrial PLC Firmware Storage
In industrial programmable logic controllers and HMI panels, the MT28F800B3WG-10T stores ladder-logic runtime firmware and configuration blocks, leveraging its -40C to +85C industrial temperature range per the Micron datasheet. The 64 KB symmetric block architecture allows selective updates of individual PLC program modules without disturbing the boot sector. Single 3.3 V supply simplifies power tree design alongside industrial MCUs.
おすすめ
Automotive Instrument Cluster Firmware
The MT28F800B3WG-10T has historically been used in automotive instrument clusters, gauge displays, and infotainment head units requiring non-volatile storage of graphics firmware and calibration tables. Its parallel interface integrates directly with legacy automotive 16-bit microcontrollers without glue logic. The wide operating voltage range (2.7 V to 3.6 V) tolerates load-dump transients common in 12 V automotive rails.
おすすめ
Set-Top Box Code Storage
Set-top box and digital TV decoder designs use the MT28F800B3WG-10T as primary boot flash for the real-time operating system and device drivers, exploiting the XIP capability to reduce DRAM footprint. The 100 ns access time aligns with typical STB MIPS/ARM core clock speeds. Hardware WP#/ACC pin supports secure firmware locking in field-deployed units.
おすすめ
Printer and Scanner Imaging Controllers
Multi-function printer controllers and document scanner subsystems use the MT28F800B3WG-10T for firmware and font tables, benefiting from byte/word selectable data width and command-driven block erase for incremental font library updates. The CFI (Common Flash Interface) identification lets a single host driver support multiple flash vendors, simplifying firmware portability across product variants.
おすすめ
Legacy Telecom Line Card Firmware
Telecom line cards and base-station controllers that persist through long deployment cycles rely on the MT28F800B3WG-10T for firmware storage with proven field reliability. The 8 Mbit density suits small RTOS plus boot, and the parallel interface pairs with legacy PowerPC and MIPS host CPUs. Industrial temperature range supports outdoor cabinet installations without active cooling.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MT28F800B3WG-10T — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MT28F800B3WG-9T | MT28F800B3WG-10B | MT28F800B3WG-10TD |
|---|---|---|---|---|
| Package | 48-TSOP I | 48-TSOP I - same | 48-TSOP I - same | 48-TSOP I - same |
| Brand | Micron Technology | Micron Technology - same | Micron Technology - same | Micron Technology - same |
| Density | 8 Mbit | 8 Mbit - same | 8 Mbit - same | 8 Mbit - same |
| Access Time | 100 ns | 90 ns (10% faster) | 100 ns - same | 100 ns - same |
| Supply Voltage | 2.7 V to 3.6 V | 2.7 V to 3.6 V - same | 2.7 V to 3.6 V - same | 2.7 V to 3.6 V - same |
| Operating Temperature | -40C to +85C | -40C to +85C - same | -40C to +85C - same | -40C to +105C (extended) |
| Packaging Form | Tape and Reel | Tape and Reel - same | Bulk Tray | Tape and Reel - same |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete |
主な差別化要因
- Industry-standard 48-TSOP I pinout enables direct migration across MT28F family members and compatible 28F-series NOR flash from other vendors. （vs MT28F800B3WG-9T)
- Extended temperature option available within the same footprint for automotive and outdoor industrial deployments. （vs MT28F800B3WG-10TD)
- Tape-and-reel packaging supports high-volume SMT assembly without manual loading. （vs MT28F800B3WG-10B)
設計ノート
Decouple VCC with a 0.1 microfarad ceramic capacitor placed within 5 mm of each VCC pin, plus a bulk 10 microfarad tantalum or ceramic capacitor on the supply rail. During program and erase operations, the device draws transient current peaks; insufficient decoupling causes VCC droop that can corrupt the internal write state machine. VPP may be tied directly to VCC for in-system programming, but routing it separately allows external 12 V programming during manufacturing test.
Route address and data signals with matched trace lengths to within 50 mils to minimize skew on 16-bit parallel reads at 100 ns access time. Place the flash device as close as practical to the host CPU to reduce capacitive loading on the address bus. Provide a solid ground plane beneath the 48-TSOP footprint to shield the parallel bus from switching noise on adjacent signal layers.
Do not leave the WP#/ACC pin floating; tie it high via a 10 kilohm pull-up to VCC to prevent accidental write protection or unintended accelerated programming transitions. The RP# pin must be held high during normal operation and only pulled low for hardware reset. After power-up, the host must poll the status register before issuing program or erase commands, per the Micron command-user-interface flow.
コンプライアンス情報
RoHS, REACH, and AEC-Q100 status not explicitly stated in the Verified Web Data; compliance should be confirmed against the Micron MT28F800B3 datasheet. Part is marked obsolete by Micron.
