PIC24FJ64GA202T-I/MM - 16-bit 32MHz 64KB Flash MCU | Microchip
部品番号: PIC24FJ64GA202T-I/MM ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $3.85 | $3.85 |
| 10 | $3.46 | $34.60 |
| 100 | $3.05 | $305.00 |
| 500 | $2.74 | $1,370.00 |
| 1,000 | $2.45 | $2,450.00 |
PIC24FJ64GA202T-I/MM 概要
An MCU (microcontroller unit) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), working RAM, and a rich set of peripherals such as ADC, timers, communication interfaces, and I/O. The PIC24F belongs to the 16-bit modified Harvard architecture family, sitting above 8-bit PIC16/PIC18 devices in performance but below the 32-bit PIC32MX/SAM families in raw throughput. The "FJ" prefix denotes Flash program memory and the "GA2" device group indicates the General-purpose Application variant with enhanced peripherals and the integrated crypto accelerator.
Key features include 64 KB self-programmable Flash, 8 KB SRAM, 16-bit modified Harvard core with single-cycle 16x16 MAC, 32 MHz operation (8 MIPS), eXtreme Low Power (XLP) technology with deep Sleep and retention modes, an integrated AES/DES crypto engine with key storage and RNG, a 12-bit ADC up to 500 ksps, multiple UART/SPI/I2C interfaces, and a Real-Time Clock/Calendar (RTCC). The 28-QFN-S package exposes most I/O and keeps the footprint to just 6x6 mm.
Architecturally, the device pairs a 16-bit RISC-like CPU with a flexible peripheral set controlled through Peripheral Pin Select (PPS). The on-chip crypto block offloads AES/DES/SHA workloads from the core and protects key material in tamper-resistant storage, an unusual feature for an MCU in this footprint and price class. The 3.3 V typical supply with 2.0–3.6 V operating range allows direct Li-ion/battery connection with internal regulation.
Typical applications include secure IoT sensor nodes, low-power wireless edge devices (BLE/Zigbee host), secure token generators, smart meters, medical wearables, and portable instrumentation requiring authenticated firmware or encrypted data logging. The QFN package and 6x6 mm footprint also suit compact security accessories such as USB tokens.
When designing with this MCU, ensure adequate decoupling (100 nF + bulk 1–10 uF near VDD/AVDD), keep the analog supply separate for best ADC SNR, and use the PPS feature to map peripherals to pins without rewiring the board. The exposed thermal pad must be soldered to the ground plane for mechanical and thermal performance.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
ドロップイン代替品: PIC24FJ64GA202T-I/MM — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC24FJ64GA202T-I/MM （同一形状・フットプリント） — 相違点: ADC, Package, Operating Temperature, Program Memory (Flash), Core.
クイック比較ツール — 並列比較する代替部品を選択:
PIC24FJ64GA202-I/MM
✅ ドロップイン✓ 在庫あり
$2.61 / 個
データシートを見る →PIC24FJ128GB202-I/MM
✅ ドロップイン✓ 在庫あり
$4.65 / 個
データシートを見る →PIC24FJ64GA204-I/MM
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
PIC24FJ64GA102T-I/ML
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$3.27 / 個
データシートを見る →PIC24FJ64GA202T-I/MM 最大定格＆電気的特性
| Core | PIC24F 16-bit modified Harvard |
| CPU Speed | 32 MHz (8 MIPS) |
| Program Memory (Flash) | 64 KB (64K x 8) |
| RAM | 8 KB |
| パッケージ | 28-QFN-S (6x6 mm) with EP |
| 実装タイプ | Surface Mount |
| Operating Voltage | 2.0 V to 3.6 V |
| 動作温度 | -40 C to +85 C (Industrial) |
| I/O Pins | 21 (typical) |
| ADC | 12-bit, up to 500 ksps |
| Crypto Engine | AES/DES/SHA hardware accelerator with key storage |
| RNG | True Random Number Generator |
| XLP (Sleep Current) | nanoWatt XLP, deep-sleep low-uA range |
| Communication | UART, SPI, I2C |
| RTCC | Yes (Real-Time Clock/Calendar) |
| RoHS | Compliant |
| MSLレベル | 3 |
PIC24FJ64GA202T-I/MM ピン構成
| ピン 1 | RA0 — I/O port A bit 0 / analog |
| ピン 2 | RA1 — I/O port A bit 1 / analog |
| ピン 3 | RA2 — I/O port A bit 2 / analog |
| ピン 4 | RA3 — I/O port A bit 3 / analog |
| ピン 5 | VDD — Positive supply |
| ピン 6 | VSS — Ground reference |
| ピン 7 | OSCI — Crystal oscillator input |
| ピン 8 | OSCO — Crystal oscillator output |
| ピン 9 | RA4 — I/O port A bit 4 |
| ピン 10 | RB0 — I/O port B bit 0 / programming |
| ピン 11 | RB1 — I/O port B bit 1 |
| ピン 12 | RB2 — I/O port B bit 2 |
| ピン 13 | RB3 — I/O port B bit 3 |
| ピン 14 | AVDD — Analog positive supply |
| ピン 15 | AVSS — Analog ground |
| ピン 16 | RB4 — I/O port B bit 4 |
| ピン 17 | RB5 — I/O port B bit 5 |
| ピン 18 | RB6 — I/O port B bit 6 / programming clock |
| ピン 19 | RB7 — I/O port B bit 7 / programming data |
| ピン 20 | RC0 — I/O port C bit 0 |
| ピン 21 | RC1 — I/O port C bit 1 |
| ピン 22 | RC2 — I/O port C bit 2 |
| ピン 23 | RC3 — I/O port C bit 3 |
| ピン 24 | RC4 — I/O port C bit 4 |
| ピン 25 | RC5 — I/O port C bit 5 |
| ピン 26 | RC6 — I/O port C bit 6 / UART TX |
| ピン 27 | RC7 — I/O port C bit 7 / UART RX |
| ピン 28 | MCLR — Master Clear reset (active low) |
| ピン EP | EP — Exposed thermal pad - connect to VSS |
主な用途
PIC24FJ64GA202T-I/MM の用途: 7 件s: Secure IoT Sensor Node, Smart Meter Data Logger, Medical Wearable / Health Patch, USB Authentication Token / Secure Dongle, Battery-Powered Edge Security Camera, Industrial Sensor Hub with Encrypted Backhaul, Portable Instrumentation Front End.
Secure IoT Sensor Node
The PIC24FJ64GA202T-I/MM is well matched to secure IoT sensor endpoints because its integrated AES/DES hardware crypto engine, hardware key storage, and true Random Number Generator remove the need for an external secure element. With 64 KB Flash and 8 KB RAM it fits lightweight MQTT-SN or CoAP stacks, and the nanoWatt XLP sleep modes drop quiescent current to the low microamp range, letting a coin-cell sensor node run for years. Placed as the host MCU between a low-power radio (BLE or sub-GHz transceiver) and analog sensors, it wakes on interrupt, samples, encrypts, transmits, and returns to deep sleep - all on a 3 V rail.
おすすめ
Smart Meter Data Logger
In a smart electricity or water meter, the PIC24FJ64GA202T-I/MM handles periodic pulse counting, tamper detection, and authenticated data logging while drawing minimal standby power from the meter's lithium battery. The RTCC block provides time-stamping without external RTC chips, and the AES engine signs meter readings before transmission to a handheld reader or uplink module. Its 32 MHz CPU is sufficient to compress and encrypt meter frames in real time, while the industrial -40 C to +85 C temperature range covers outdoor enclosure deployments.
おすすめ
Medical Wearable / Health Patch
For disposable health patches and wearables, the PIC24FJ64GA202T-I/MM's small 6x6 mm QFN footprint, deep-sleep XLP current, and integrated crypto for HIPAA-grade data protection are decisive advantages. It can sample biopotential or optical sensors at low duty cycle, run on-chip AES to encrypt biometric logs, and wake only when an event of interest is detected. The 12-bit ADC at 500 ksps handles ECG-class waveforms, and the small package leaves room for a thin-film battery and BLE antenna on a flex PCB.
おすすめ
USB Authentication Token / Secure Dongle
The integrated hardware crypto engine, true RNG, and tamper-resistant key storage make the PIC24FJ64GA202T-I/MM suitable for compact USB authentication tokens that perform on-device AES signing. Its 64 KB Flash is ample for challenge-response firmware, and the small QFN-S package fits inside a USB-A or USB-C dongle housing. Industrial temperature operation and 3.3 V operation simplify direct USB power interfacing with a regulator.
おすすめ
Battery-Powered Edge Security Camera
Low-power edge cameras that need signed firmware and authenticated video frames benefit from the PIC24FJ64GA202T-I/MM's hardware AES and RNG. The MCU supervises an image sensor, encrypts captured frames for storage on an external SPI Flash, and manages deep-sleep between PIR-triggered capture events. The 12-bit ADC and PPS flexibility allow direct connection to a PIR sensor and ambient light sensor without glue logic, and the RTCC provides time-stamping on battery backup.
おすすめ
Industrial Sensor Hub with Encrypted Backhaul
In an industrial sensor hub, the PIC24FJ64GA202T-I/MM aggregates multiple analog and digital sensor inputs, runs local threshold logic, and encrypts packets before forwarding over RS-485 or CAN. Its UART/SPI/I2C count and PPS remapping allow several sensor chains to share bus pins. Hardware AES offloads secure backhaul from the CPU, freeing MIPS for data fusion, while XLP modes keep idle hubs below milliamp draw on 24 V industrial rails stepped down to 3.3 V.
おすすめ
Portable Instrumentation Front End
Handheld test instruments benefit from the PIC24FJ64GA202T-I/MM's combination of 12-bit 500 ksps ADC, integrated crypto for signed calibration data, and small QFN footprint. The MCU digitizes analog signals, encrypts calibration certificates, drives a display, and enters XLP sleep between measurements to extend battery runtime. The RTCC timestamps logged data, and PPS remaps analog and digital interfaces to keep the PCB compact.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC24FJ64GA202T-I/MM — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC24FJ64GA202-I/MM | PIC24FJ128GB202-I/MM | PIC24FJ64GA204-I/MM | PIC24FJ64GA102T-I/ML |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-QFN-S (6x6 mm) | 28-QFN-S (6x6 mm) - same | 28-QFN-S (6x6 mm) - same | 28-QFN-S (6x6 mm) - same | 28-QFN (6x6 mm) - same footprint |
| Flash | 64 KB | 64 KB (identical die) | 128 KB (+100%) | 64 KB | 64 KB |
| RAM | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| Core / CPU Speed | PIC24F 16-bit @ 32 MHz (8 MIPS) | PIC24F 16-bit @ 32 MHz | PIC24F 16-bit @ 32 MHz | PIC24F 16-bit @ 32 MHz | PIC24F 16-bit @ 32 MHz |
| Crypto Engine | AES/DES/SHA + key storage + RNG | AES/DES/SHA + key storage + RNG | AES/DES/SHA + key storage + RNG | AES/DES/SHA + key storage + RNG | No integrated crypto |
| Operating Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| Temperature Range | -40 C to +85 C (Industrial) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Packaging | Tape & Reel ('T' suffix) | Tube | Tube | Tube | Tape & Reel |
| Unit Price (qty 1000) | $2.45 (as of 2026-09-30) | $2.45 | $2.95 | $2.55 | $2.30 |
主な差別化要因
- Integrated hardware crypto engine in 28-QFN-S footprint （vs PIC24FJ64GA102T-I/ML)
- Drop-in QFN-S pin compatibility with same Microchip XLP family （vs PIC24FJ128GB202-I/MM)
- Tape-and-reel option for high-volume assembly （vs PIC24FJ64GA202-I/MM)
- nanoWatt XLP deep-sleep current （vs PIC24FJ64GA010-I/PF)
設計ノート
Place a 100 nF ceramic decoupling capacitor within 5 mm of every VDD/AVDD pin, plus a bulk 1–10 uF near the supply entry. The PIC24FJ64GA202T-I/MM's XLP sleep currents in the low microamp range are achievable only when all peripherals are explicitly disabled in software before Sleep; leaving peripherals clocked will pull tens of microamps even in deep sleep. Tie unused I/O pins to defined logic levels (not floating) to avoid parasitic current through input buffers.
The 28-QFN-S package has a center exposed thermal pad that must be soldered to a grounded copper pour (preferably the main ground plane) for both thermal dissipation and mechanical reliability. Use an array of thermal vias (typically 5–9 vias, 0.3 mm drill) under the EP to conduct heat into inner ground layers. For high-vibration deployments, under-fill the QFN to reduce solder-joint fatigue on the perimeter leads.
Route the analog inputs (ANx pins) away from digital clocks and switching nodes; keep the AVDD/AVSS traces short and isolated from noisy digital rails with a ferrite bead or pi-filter. The 12-bit ADC at 500 ksps is sensitive to switching noise from the internal crypto engine - place bulk capacitance adjacent to AVDD and consider sequencing the ADC sample acquisition outside crypto engine active bursts. The MCLR pin should be tied to VDD through a 10 kohm pull-up and have a 100 nF cap to ground for noise immunity.
Do not program the configuration bits to disable the internal regulator unless you provide an external 1.8 V core supply. ICSP programming requires PGECx/PGEDx pins to be accessible and not bonded out as user I/O only - check the specific pinout for your package. The Peripheral Pin Select (PPS) feature must be unlocked via the IOLOCK bit sequence; lock it again after configuration to prevent runaway code from remapping peripherals at runtime.
For SPI communications above 10 MHz, place a 33 ohm series-termination resistor close to the driving pin to dampen ringing on the SCK/MOSI lines. The I2C bus requires pull-ups sized for the bus capacitance (typically 2.2 kohm to 4.7 kohm at 400 kHz). When using the RTCC with an external 32.768 kHz crystal, route the SOSC pins as a short, symmetric pair guarded by a ground trace to minimize frequency error and jitter.
コンプライアンス情報
RoHS and REACH compliant per Microchip product page. Industrial temperature grade (-40 C to +85 C). Not AEC-Q100 qualified - select automotive-grade PIC24F variants for automotive applications. Halogen-free per Microchip environmental compliance documentation.
