SN74HC21-Q1 - Dual 4-Input AND Gate, 2-6V | TI
部品番号: SN74HC21-Q1 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $0.42 | $0.42 |
| 10 | $0.38 | $3.80 |
| 100 | $0.29 | $29.00 |
| 500 | $0.23 | $115.00 |
| 1,000 | $0.19 | $190.00 |
| 3,000 | $0.16 | $480.00 |
SN74HC21-Q1 概要
A logic gate is the fundamental building block of digital circuits, performing a Boolean operation on one or more binary inputs to produce a single binary output. Within the logic IC hierarchy, the AND gate family, the 74HC High-Speed CMOS series, and the broader CMOS logic category place this device among the most widely standardized components in electronics. The HC family combines CMOS low static power with TTL-like speed, making 74HC devices broadly interchangeable across semiconductor vendors.
Key features include a wide 2 V to 6 V operating range supporting 3.3 V, 5 V, and mixed-voltage automotive rails, a typical propagation delay of 11 ns at 5 V, and ±4 mA output drive at 5 V allowing the outputs to drive up to ten LSTTL loads. Input current is extremely low at 1 uA maximum, and quiescent supply current is only 20 uA maximum, minimizing standby power in always-on automotive modules.
Technically, the device uses HC CMOS architecture with rail-to-rail CMOS input thresholds, providing high noise immunity (typically 28% of VCC) and balanced drive. The automotive catalog variant is characterized across the extended AEC-Q100 temperature range with enhanced process controls and documentation.
Typical applications include safety-interlock gating in automotive body modules, enable gating for power sequences, sensor qualification logic in ADAS perception modules, and general glue logic in ECU, gateway, and instrument-cluster boards.
Design tip: tie all unused gate inputs to VCC or GND - never leave CMOS inputs floating, or both transistors can conduct and increase current draw. Keep decoupling (100 nF) close to VCC pin 14 for switching-transient control.
ドロップイン代替品: SN74HC21-Q1 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: SN74HC21-Q1 （同一形状・フットプリント） — 相違点: Logic Family, Package.
クイック比較ツール — 並列比較する代替部品を選択:
SN74HC21QDRQ1
✅ ドロップイン📋 参考代替品（カタログ未掲載）
SN74HC21DR
✅ ドロップイン✓ 在庫あり
$0.14 / 個
データシートを見る →74HC21D,653
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
MC74HC21ADG
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
TC74HC21AF
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
SN74HC21-Q1 最大定格＆電気的特性
| Logic Function | Dual 4-Input Positive-AND Gate |
| Logic Family | HC (High-Speed CMOS) |
| Number of Channels | 2 |
| Inputs per Gate | 4 |
| Supply Voltage Range | 2 V to 6 V |
| Output Drive Strength | 5.2 mA |
| Output Drive at 5 V | ±4 mA |
| Typical Propagation Delay | 11 ns at 5 V |
| Max Input Current | 1 uA |
| Max Quiescent Supply Current | 20 uA |
| LSTTL Load Drive | Up to 10 LSTTL loads |
| Boolean Function | Y = A • B • C • D (positive logic) |
| Qualification | AEC-Q100 Automotive Catalog |
| パッケージ | SOIC-14 (D) |
| 実装タイプ | Surface Mount |
| RoHS ステータス | Compliant |
SN74HC21-Q1 ピン構成
| ピン 1 | 1A — Gate 1 input A |
| ピン 2 | 1B — Gate 1 input B |
| ピン 3 | NC — No connect |
| ピン 4 | 1C — Gate 1 input C |
| ピン 5 | 1D — Gate 1 input D |
| ピン 6 | 1Y — Gate 1 output |
| ピン 7 | GND — Ground |
| ピン 8 | 2Y — Gate 2 output |
| ピン 9 | 2A — Gate 2 input A |
| ピン 10 | 2B — Gate 2 input B |
| ピン 11 | 2C — Gate 2 input C |
| ピン 12 | 2D — Gate 2 input D |
| ピン 13 | NC — No connect |
| ピン 14 | VCC — Supply voltage, 2 V to 6 V |
主な用途
SN74HC21-Q1 の用途: 6 件s: Automotive Safety Interlock Logic, Power Sequencing Enable Gating, ADAS Sensor Qualification Logic, ECU and Gateway Glue Logic, Instrument Cluster Indicator Gating, Industrial PLC and Automation Logic.
Automotive Safety Interlock Logic
In body-control and domain ECU modules, multiple enable signals (ignition status, sensor validity, diagnostics OK) must be qualified with a single active output. The SN74HC21-Q1 gates four such signals per channel at 2 V to 6 V, with AEC-Q100 qualification covering the automotive temperature range. Its 11 ns propagation delay adds negligible latency to safety paths, while the 1 uA max input current lets it be driven directly by MCU GPIOs or open-drain supervisors without loading. Placed between status-flag nets and interrupt or power-enable pins, the AND output asserts only when all monitored conditions are valid.
おすすめ
Power Sequencing Enable Gating
Multi-rail power supplies often require that a DC-DC enable line only assert when power-good flags from several regulators are simultaneously high. The SN74HC21-Q1 combines up to four power-good outputs in one SOIC-14 gate with a 2 V to 6 V range compatible with 3.3 V and 5 V supervision logic. The 20 uA max quiescent current is negligible even in standby, and rail-to-rail CMOS inputs give high noise margin against supply-ramp transients. The 5.2 mA output drive directly sources the soft-start or EN pin of downstream converters without additional buffering.
おすすめ
ADAS Sensor Qualification Logic
ADAS perception modules must verify that sensor data streams (camera frame-valid, radar interrupt, LiDAR ready) are simultaneously active before trusting fusion outputs. The SN74HC21-Q1 provides two independent 4-input qualification gates in AEC-Q100 grade, with fast 11 ns typical propagation keeping the qualification path out of the latency budget. Wide 2 V to 6 V operation matches mixed-voltage sensor interfaces, and the low 1 uA input current permits fan-in from multiple sensor front-ends. Outputs can drive up to ten LSTTL loads, allowing the qualification result to fan out to several safety monitors.
おすすめ
ECU and Gateway Glue Logic
General-purpose glue logic in engine control units and gateways frequently needs to combine chip-select, direction, and mode signals into a single enable. The SN74HC21-Q1 performs this in one SOIC-14 package, on 5 V rails with ±4 mA drive at 5 V and 11 ns typical delay, replacing multiple discrete transistors or resistor-diode AND structures. The automotive catalog grade and wide 2 V to 6 V range tolerate crank and load-dump induced supply variation, while HC noise immunity (thresholds at roughly 45% and 55% of VCC) resists in-vehicle EMI on routed enable lines.
おすすめ
Instrument Cluster Indicator Gating
Cluster and interior modules combine multiple warning conditions (door open, seatbelt unfastened, fluid low) to drive a single telltale lamp output. The SN74HC21-Q1 ANDs up to four active-low or active-high status flags per gate, with the second gate available for a separate indicator group. Its 2 V to 6 V range supports battery-conditioned 5 V logic, and AEC-Q100 qualification addresses the extended cabin temperature environment. The 20 uA maximum supply current keeps the logic alive in key-off sleep modes without measurable battery drain.
おすすめ
Industrial PLC and Automation Logic
Industrial controllers gate safety-door, E-stop, and interlock signals before enabling actuators, and the 74HC21 function is a standard choice. The same SOIC-14 die in commercial SN74HC21DR form suits factory-floor panels where AEC-Q100 is not required. The 4-input structure consolidates up to eight discrete conditions in one package, 11 ns delay is immaterial next to relay and contactor response times, and 5 V HC drive of 10 LSTTL loads permits direct LED-indicator or optocoupler driving with a series resistor.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: SN74HC21-Q1 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | SN74HC21QDRQ1 | SN74HC21DR | 74HC21D,653 | MC74HC21ADG |
|---|---|---|---|---|---|
| Package | SOIC-14 (D) | SOIC-14 (D) - same | SOIC-14 (D) - same | SOIC-14 - same | SOIC-14 - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Nexperia | onsemi |
| Supply Voltage Range | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V | 2 V to 6 V |
| Function | Dual 4-input AND | Dual 4-input AND | Dual 4-input AND | Dual 4-input AND | Dual 4-input AND |
| Automotive Qualification | AEC-Q100 (Q1) | AEC-Q100 (Q1) | No | No (industrial) | No (industrial) |
主な差別化要因
- AEC-Q100 automotive qualification （vs SN74HC21DR)
- Fast HC speed with dual 4-input gating （vs CD4082BE)
- Broad multi-vendor 74HC21 standardization （vs 74HC21D,653)
設計ノート
Place a 100 nF ceramic decoupling capacitor within 5 mm of pin 14 (VCC) to pin 7 (GND). HC CMOS gates draw dynamic shoot-through current at switching edges; without local decoupling this appears as ground bounce on shared PCB nets. For boards with multiple gates switching simultaneously, add a 1 uF bulk capacitor per logic cluster.
Never leave any of the eight gate inputs floating. A floating CMOS input floats near the switching threshold where both MOSFETs conduct, raising ICC and creating oscillating intermediate outputs. Terminate unused inputs of unused gates to VCC or GND directly, or via 10k pull resistors if the node may be probed or reconfigured.
HC-family input thresholds are approximately 50% of VCC, so slow rise-time signals (RC-filtered, long wires, or analog comparators without hysteresis) can cause the gate output to chatter through the threshold region. If driving the SN74HC21-Q1 from slow or noisy signals, add an HC14 Schmitt-trigger buffer ahead of the gate inputs to guarantee monotonic transitions.
Level shifting caution: at VCC = 5 V, VIH min is roughly 3.5 V, so 3.3 V CMOS drivers are out of spec even though they may work in bench testing. Either run the gate at VCC = 3.3 V, or use an HCT-family input device (TTL thresholds ~2 V) for reliable mixed-voltage interfacing.
コンプライアンス情報
AEC-Q100 automotive catalog qualified per TI product page. RoHS/lead-free status typical of current TI production; verify on TI product page for specific orderable suffix.
