TPS38700C04NRGER - I2C 12-Ch Power Sequencer | Texas Instruments
部品番号: TPS38700C04NRGER ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.63 | $4.63 |
| 10 | $4.18 | $41.80 |
| 100 | $3.71 | $371.00 |
| 500 | $3.34 | $1,670.00 |
| 1,000 | $2.97 | $2,970.00 |
TPS38700C04NRGER 概要
A power-supply sequencer is a supervisory power-management IC that enforces the order in which system rails turn on and off, preventing in-rush, latch-up, and signal contention in complex multi-rail SoCs, FPGAs, and processor designs. It belongs to the hierarchy: power-supply sequencer -> supervisor/monitor -> power management IC -> semiconductor. Sequencers differ from simple voltage supervisors in that they actively drive enable pins of downstream regulators in a timed sequence, rather than just asserting a reset signal once all rails are valid.
Key features of the TPS38700C04NRGER include: up to 12 sequencing slots assignable via OTP or I2C, a programmable window watchdog with GPIO conversion, individual rail voltage monitoring with programmable thresholds, and an integrated 4-channel 8-bit ADC for margining or telemetry. The I2C interface (Fast/Standard mode, 100/400 kHz) allows in-system reprogramming of slot timing, watchdog timeout, and fault-handling behavior. Default sequencing is loaded from OTP at power-up so the device functions even before host software initializes.
Architecturally, the TPS38700 uses a precision bandgap reference, per-channel programmable-threshold comparators, a 4-channel ADC for rail margining, and a sequencing state machine with non-volatile OTP memory. The internal EEPROM-style storage holds the default configuration (C04 variant), while I2C provides dynamic override of slot timing and watchdog windows. The 24-pin VQFN provides low thermal resistance for the modest power dissipation typical of supervisory ICs.
Typical applications include sequencing of FPGA/SoC core, I/O, and auxiliary rails; ASIC and processor power-up coordination; telecom baseband power sequencing; and industrial control boards that require multi-rail coordination with fault response. The window watchdog and GPIO conversion simplify host-side fault handling.
A key design consideration is OTP variant selection - the C04 suffix indicates a factory-programmed default sequence - so engineers must verify the C04 default matches their required rail order before committing the design to layout, and budget I2C lines if field reprogramming is required.
This page synthesizes distributor pricing, drop-in alternative sequencing parts sharing the same 24-pin VQFN footprint, and practical design notes that are not consolidated in the manufacturer datasheet alone.
ドロップイン代替品: TPS38700C04NRGER — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
TPS38700C03NRGER
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TPS38700C05NRGER
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TPS38700C04NRGET
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TPS38700RGEEVM
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TPS38700C04NRGER 仕様
| 機能 | Power-supply sequencer with I2C support |
| Number of Sequenced Channels | Up to 12 |
| Number of Monitored Voltage Rails | Up to 6 (via integrated 4-ch 8-bit ADC) |
| Supply Voltage Range (VDD) | 1.6 V to 5.5 V |
| OTP Variant Code | C04 (factory-programmed default sequence) |
| I2C Interface | Standard/Fast mode (100/400 kHz) |
| Watchdog | Window watchdog with programmable timeout |
| GPIO Conversion | Yes (configurable as logic inputs) |
| ADC | 4 channel, 8-bit, for rail margining/telemetry |
| 動作温度範囲 | -40 C to +125 C |
| パッケージ | VQFN-24 (RGE) 4x4 mm |
| 実装タイプ | Surface Mount |
| MSLレベル | 2 (1 year floor life) |
| RoHS ステータス | Compliant |
| Lead-Free | Yes |
TPS38700C04NRGER ピン構成
| ピン 1 | EN1 — Sequencer output / enable channel 1 |
| ピン 2 | EN2 — Sequencer output / enable channel 2 |
| ピン 3 | EN3 — Sequencer output / enable channel 3 |
| ピン 4 | EN4 — Sequencer output / enable channel 4 |
| ピン 5 | EN5 — Sequencer output / enable channel 5 |
| ピン 6 | EN6 — Sequencer output / enable channel 6 |
| ピン 7 | EN7 — Sequencer output / enable channel 7 |
| ピン 8 | EN8 — Sequencer output / enable channel 8 |
| ピン 9 | EN9 — Sequencer output / enable channel 9 |
| ピン 10 | EN10 / NEM_PD — Sequencer output 10 or alternative function NEM_PD (OTP C04) |
| ピン 11 | EN11 — Sequencer output / enable channel 11 |
| ピン 12 | EN12 / Slot 0 — Sequencer output 12 or assigned to Slot 0 (OTP C04) |
| ピン 13 | GND — Ground |
| ピン 14 | VDD — Supply voltage 1.6 V to 5.5 V |
| ピン 15 | SCL — I2C serial clock (open-drain, requires pull-up) |
| ピン 16 | SDA — I2C serial data (open-drain, requires pull-up) |
| ピン 17 | nRESET — Active low reset to host |
| ピン 18 | nPGOOD — Active low power-good output |
| ピン 19 | GPI1 — General-purpose input / GPIO conversion |
| ピン 20 | GPI2 — General-purpose input / GPIO conversion |
| ピン 21 | ADCIN1 — ADC input channel 1 (rail margining) |
| ピン 22 | ADCIN2 — ADC input channel 2 (rail margining) |
| ピン 23 | ADCIN3 — ADC input channel 3 (rail margining) |
| ピン 24 | ADCIN4 / WDI — ADC input channel 4 / watchdog input |
主な用途
TPS38700C04NRGER の用途: 6 件s: FPGA / SoC Multi-Rail Power-Up Sequencing, Telecom Baseband / RF Power Sequencing, Industrial Multi-Rail Controller Board Sequencing, ASIC / Processor Power-Up Coordination, Server / Storage Controller Card Sequencing, Automotive ECU Multi-Rail Sequencing.
FPGA / SoC Multi-Rail Power-Up Sequencing
The TPS38700C04NRGER is ideally suited to FPGA and SoC multi-rail power-up sequencing where deterministic ordering of core, I/O, PLL, and auxiliary rails is critical to prevent latch-up and in-rush transients. With up to 12 sequence channels, a programmable window watchdog, and OTP-default sequencing that operates before host software initializes, the device can sequence a complex Zynq, Kintex, or similar SoC's rails without host intervention. The C04 OTP variant defines the default order so that even unprogrammed production boards power up safely. Integrated per-channel voltage monitoring with programmable thresholds catches brown-outs, while the 4-channel 8-bit ADC supports rail margining during manufacturing test. The 24-pin VQFN (4x4 mm) footprint saves board area compared to discrete supervisor arrays.
おすすめ
Telecom Baseband / RF Power Sequencing
In telecom baseband and RF line-card designs, the TPS38700C04NRGER coordinates the power-up of multiple low-noise RF rails where supply sequencing directly affects phase-locked loop lock time and RF performance. Its 1.6 V to 5.5 V supply range matches common 3.3 V system rails, and its 12-channel capacity covers the dozen or more rails typically found in macro base station and small-cell RF chains. The window watchdog with GPIO conversion allows a baseband processor to detect PLL lock loss and fault-reset the RF section without external glue logic. The C04 OTP default sequencing provides deterministic behavior in factory-fresh units, while I2C reprogramming supports late-stage BOM changes during platform bring-up.
おすすめ
Industrial Multi-Rail Controller Board Sequencing
Industrial PLC and process-control platforms rely on the TPS38700C04NRGER to coordinate deterministic power-up of isolated communications rails, ADC reference rails, and digital logic supplies, where the -40 C to +125 C industrial temperature range ensures operation in factory-floor environments. With up to 12 sequence channels and a window watchdog, the device reduces BOM count versus discrete supervisor arrays and provides fault response (nRESET/nPGOOD) to the host controller on any rail brown-out. The integrated 4-channel 8-bit ADC allows the controller board to perform rail margining in production test without an external ADC. OTP defaults ensure out-of-box correct sequencing before any host firmware boots, a critical requirement for IEC 61131-2 compliant industrial designs.
おすすめ
ASIC / Processor Power-Up Coordination
For ASIC and processor power-up coordination, the TPS38700C04NRGER provides the deterministic rail ordering that prevents CMOS latch-up and substrate-current injection during system start-up. The OTP-programmed C04 default sequence boots the device before any host is available, so even a freshly-assembled ASIC board powers up in the correct order without software intervention. Per-channel programmable thresholds catch under-voltage events on each rail, and the integrated window watchdog detects host processor lock-up independent of the agent timing. The 24-pin VQFN (4x4 mm) footprint is compatible with hand-rework and reflow profiles used in ASIC evaluation board manufacturing, where the sequencer often replaces discrete RC-delay chains and discrete supervisor ICs.
おすすめ
Server / Storage Controller Card Sequencing
In server backplanes and storage controller cards, the TPS38700C04NRGER sequences the dozen-plus rails that feed SAS/SATA controllers, NVMe controllers, and supporting PHYs, where any out-of-order power-up can corrupt in-flight PCIe or SATA link training. With I2C reprogrammability, the sequencer supports late-stage configuration changes during platform bring-up, and the OTP-default C04 sequence ensures the card powers up correctly even before BMC firmware loads. The integrated window watchdog and GPIO conversion provide fault detection for the storage controller CPU without external logic. The 1.6 V to 5.5 V VDD range matches common 3.3 V standby rails, and the 24-pin VQFN footprint suits the high-density layout of server add-in cards.
おすすめ
Automotive ECU Multi-Rail Sequencing
Although the TPS38700C04NRGER itself is not AEC-Q100 qualified, it is widely used in non-automotive-grade ECU development boards and industrial controllers where deterministic multi-rail sequencing is required. With up to 12 sequence channels, OTP-default sequencing, and a window watchdog that detects processor lock-up, the device replaces discrete supervisor chains in ECU prototypes and pre-production validation hardware. The -40 C to +125 C industrial temperature range and 24-pin VQFN footprint are well matched to ECU module layouts. For production automotive designs requiring AEC-Q100, designers should evaluate the TI TPS38700-Q1 equivalent family or pair the TPS38700 with an external automotive-grade supervisor.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: TPS38700C04NRGER — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | TPS38700C03NRGER | TPS38700C05NRGER | TPS38700C04NRGET |
|---|---|---|---|---|
| Package | VQFN-24 (RGE) 4x4 mm | VQFN-24 (RGE) 4x4 mm - same | VQFN-24 (RGE) 4x4 mm - same | VQFN-24 (RGE) 4x4 mm - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Number of Sequenced Channels | Up to 12 | Up to 12 | Up to 12 | Up to 12 |
| OTP Variant | C04 | C03 (different default sequence) | C05 (different default sequence) | C04 (identical OTP) |
| Supply Voltage Range | 1.6 V to 5.5 V | 1.6 V to 5.5 V | 1.6 V to 5.5 V | 1.6 V to 5.5 V |
| Watchdog | Window watchdog | Window watchdog | Window watchdog | Window watchdog |
| Integrated ADC | 4-ch 8-bit | 4-ch 8-bit | 4-ch 8-bit | 4-ch 8-bit |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C |
主な差別化要因
- Up to 12 sequence channels with OTP defaults （vs LM3880 (3-channel fixed-time sequencer))
- Integrated window watchdog and 4-channel 8-bit ADC （vs Discrete supervisor array (e.g., multiple TPS3898 + external ADC))
- I2C reprogrammability with non-volatile OTP defaults （vs UCD90120A (no OTP, requires full I2C programming))
設計ノート
Place the TPS38700C04NRGER close to the host processor's reset and I2C pins to minimize trace length on the nRESET and SDA/SCL lines. The 24-pin VQFN (4x4 mm) exposed thermal pad must be soldered to a continuous ground plane for thermal dissipation and electrical reference. Keep high-current switching regulator traces away from the sequencer's analog inputs (ADCIN1-4) to avoid coupling noise into the on-chip 8-bit ADC used for rail margining.
The TPS38700 VDD supply range is 1.6 V to 5.5 V. Power the sequencer from a low-noise rail (typically 3.3 V standby) so its comparators and ADC operate accurately. Add a 1 uF ceramic decoupling capacitor close to the VDD pin and a 0.1 uF bypass capacitor on the exposed pad ground. The TPS38700 draws modest quiescent current from VDD (see electrical characteristics in the datasheet), and its output EN pins source/sink minimal current - they are logic-level control signals, not power switches.
I2C lines SDA and SCL are open-drain and require external pull-up resistors (typically 2.2 kohm to 10 kohm) tied to the same VDD rail that powers the sequencer. For 400 kHz Fast-mode operation, keep bus capacitance under 200 pF by limiting trace length and node count. If the host processor is on a different voltage domain than the TPS38700, use a level shifter such as the TXS0102 on the I2C bus rather than relying on the sequencer's 5.5 V tolerant inputs.
Common pitfalls: (1) selecting the wrong OTP variant - the C04 suffix defines a specific default rail order that may not match your system; always verify the OTP mapping against your required power-up sequence in the datasheet; (2) assuming the sequencer outputs power - EN1-EN12 are logic-level control signals, not high-current drivers; (3) forgetting the watchdog service routine - the window watchdog will assert nRESET if the host fails to service it within the programmed window; (4) using the ADC inputs for high-impedance rail sensing without input buffers - the on-chip 8-bit ADC has limited input current and is intended for rail margining, not precision measurement.
Estimated: The TPS38700 is a low-power supervisory IC and dissipates well under 100 mW in typical operation. With a VQFN-24 (4x4 mm) exposed thermal pad soldered to a 1 oz copper ground pour of approximately 1 square inch, junction-to-ambient thermal resistance is roughly 35-40 C/W, giving a junction temperature rise of 3-4 C at 100 mW - well within the -40 C to +125 C operating range. No external heatsink is required.
コンプライアンス情報
RoHS compliant per TI product page; -Q1 AEC-Q100 automotive variants are not available for this part - evaluate TPS38700-Q1 family or external automotive-grade supervisor for production automotive designs.
