UCD9090RGZ - 10-Rail Sequencer/Monitor, 48-VQFN | Texas Instruments
部品番号: UCD9090RGZ ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $7.93 | $7.93 |
| 10 | $7.1 | $71.00 |
| 100 | $6.05 | $605.00 |
| 500 | $5.42 | $2,710.00 |
| 1,000 | $4.79 | $4,790.00 |
UCD9090RGZ 概要
A power supply sequencer is a dedicated supervisory IC that turns rails on and off in a defined order, monitors their health after start-up, and reacts to faults. In the broader hierarchy it sits between the PMBus-controlled point-of-load (POL) converters it commands and the system-level power management firmware running on the host. Devices such as the UCD9090RGZ replace discrete supervisory chains with a single programmable, telemetry-rich block that designers can reconfigure over PMBus without a board spin.
Key features include per-rail margining, programmable under-voltage and over-voltage thresholds, fault logging in non-volatile memory, watchdog timer, and pin-selected low-power states via up to three GPIs (eight ACPI-style states). The on-board 2.5 V, 0.5% internal reference gives repeatable ADC-based rail measurements, while the 12-bit ADC provides 0.1% typical resolution across the 0 V-2.5 V range. ACPI support lets the device implement S0/S1/S3/S4/S5-style low-power modes for energy-aware systems.
Architecturally, the UCD9090RGZ pairs an internal ARM7-class controller with the sequencer/monitor state machine. The host configures rails via PMBus commands; the on-chip sequencer then drives external PGOOD/ENABLE/MARGIN pins and reads back rail voltages through the muxed ADC. The 48-VQFN (RGZ) package provides adequate thermal headroom for the 3.3 V supply operation.
Typical applications include FPGA/processor power sequencing in telecom and networking line cards, ATCA/AMC/ATX power rails in servers, industrial PLCs with multiple voltage domains, and any system requiring ACPI-style sleep state coordination. The UCD90SEQ48EVM-560 evaluation module accelerates bring-up using the UCD9090RGZ on a 48-pin socketed board with USB-to-PC GUI.
When designing with this part, place the device close to the regulators it sequences to minimize the loop on the EN/MARGIN/PGOOD traces, and follow TI's recommended BUF layout for the 0.1 uF/1 uF/10 uF decoupling. The fault log, programmable GPI de-bounce, and per-rail fault-response policy should be configured in the Fusion Digital Power Designer GUI before production.
This page consolidates distributor pricing, drop-in alternatives, and design notes not bundled into the manufacturer datasheet, giving engineers a faster path from selection to bring-up.
ドロップイン代替品: UCD9090RGZ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
UCD9090RGZR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
UCD9090RGZT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
UCD9090ARGZR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
UCD90120ARGZR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
UCD90124ARGZR
✅ ドロップイン📋 参考代替品（カタログ未掲載）
UCD90320U
✅ ドロップイン📋 参考代替品（カタログ未掲載）
UCD9090RGZ 仕様
| Number of Rails Monitored | 10 |
| Number of GPIs | 8 (3 GPI pin-selected states for ACPI) |
| ADC Resolution | 12-bit |
| Internal Reference | 2.5 V, 0.5% |
| Communication Interface | PMBus / I2C |
| 電源電圧 | 3.3 V (typical) |
| ACPI Support | Yes (S0/S1/S3/S4/S5-style states via GPIs) |
| Fault Logging | Yes (non-volatile memory) |
| Watchdog Timer | Yes (programmable) |
| Per-Rail Margining | Yes |
| Programmable Thresholds | Under-voltage / Over-voltage, per rail |
| 動作温度 | -40C to +85C |
| パッケージ | 48-VQFN (RGZ) 7x7 mm |
| 実装タイプ | Surface Mount |
| MSLレベル | 2 (1 year floor life) |
| RoHS ステータス | Compliant |
| Evaluation Module | UCD90SEQ48EVM-560 (48-pin socketed board with USB) |
UCD9090RGZ 48-vqfn (rgz) 7x7 mm ピン配置ガイド
UCD9090RGZ (48-vqfn (rgz) 7x7 mm パッケージ) のピン配置。 ピン番号、機能、接続図はメーカーのデータシートで定義されています。正確なフットプリントとはんだ付けのガイドラインについては、データシートを参照してください。
詳細なピン配置データはありません: UCD9090RGZ.
詳細は データシート をご参照ください。
主な用途
UCD9090RGZ の用途: 6 件s: FPGA / Processor Power Sequencing, ATCA / AMC / Server Power Rails, Industrial PLC Multi-Rail Designs, ACPI-Enabled Computing Platforms, Telecom Baseband Card Sequencing, Test & Measurement Instrumentation.
FPGA / Processor Power Sequencing
The UCD9090RGZ fits ten commonly adopted use cases including FPGA core/IO/DDR/PHY/aux rail sequencing in telecom and networking line cards. Its 10-rail capacity matches typical FPGA power trees where each rail must come up in a vendor-defined order to prevent latch-up. The 12-bit ADC and per-rail margining enable precise under/over-voltage threshold checks at start-up and during steady-state, while PMBus reconfigurability lets the same hardware ship across multiple SKUs. Designers typically place the device near the regulators it sequences to minimize EN/MARGIN/PGOOD loop area, and use the Fusion Digital Power Designer GUI for bring-up.
おすすめ
ATCA / AMC / Server Power Rails
In ATCA and AMC carrier-grade systems, the UCD9090RGZ sequences the multiple 12 V/3.3 V/1.8 V/1.0 V rails required by payload boards. Its ACPI-style pin-selected low-power states (S0/S3/S5) align with management controller commands and enable coordinated sleep transitions across an entire chassis. The on-board fault log captures under-voltage events for post-mortem analysis without burdening the host CPU. When paired with PMBus POL converters (TPS54xxx family) the design achieves full digital telemetry, simplifying ATCA board-level compliance testing and field diagnostics.
おすすめ
Industrial PLC Multi-Rail Designs
Industrial PLCs typically isolate logic, analog, motor-driver, and communication domains on separate voltage rails, all of which the UCD9090RGZ sequences. Its -40C to +85C industrial temperature rating and ACPI-style sleep modes support factory-floor duty-cycling to reduce energy and prolong life. The integrated 12-bit ADC continuously verifies that analog rails remain within tolerance during noisy motor-switching events, allowing the PLC controller to react before downstream ADC readings degrade. The 48-VQFN (RGZ) 7x7 mm footprint sits comfortably on a 4-layer PLC base board.
おすすめ
ACPI-Enabled Computing Platforms
The UCD9090RGZ implements ACPI-style low-power states via three GPI pins that select up to eight system states (S0/S1/S3/S4/S5). When the host chipset signals a sleep transition, the UCD9090RGZ orchestrates a coordinated rail-down sequence and verifies each rail's discharge before the next stage. This eliminates software race conditions in power-down handshakes. The on-board non-volatile fault log retains brownout history even through full power loss, accelerating field debug and reducing RMA cost in embedded and edge-computing platforms.
おすすめ
Telecom Baseband Card Sequencing
Telecom baseband cards require deterministic sequencing of DSP, framer, and clock generator supplies. The UCD9090RGZ provides per-rail enable/margin outputs and reads back rail voltages for closed-loop verification during commissioning. Its PMBus interface exposes telemetry to the management processor, enabling remote health monitoring without dedicated analog sense paths. With 10-rail capacity, the device typically handles the entire baseband rail tree including core, IO, DDR, PLL, and PHY supplies, simplifying the BOM versus discrete supervisors.
おすすめ
Test & Measurement Instrumentation
Benchtop and ATE-grade instrumentation requires deterministic power-up to avoid spurious signals at first measurement after cold start. The UCD9090RGZ sequences analog, digital, and high-voltage rails in a vendor-defined order, while the 12-bit ADC verifies each rail reaches its setpoint within tolerance. Combined with per-rail margining, the same hardware can be reused for incoming-quality test routines, where each rail is swept to verify the DUT operates correctly at the production corners. The 48-VQFN footprint allows placement adjacent to the regulators it commands.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: UCD9090RGZ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | UCD9090RGZR | UCD9090ARGZR | UCD90120ARGZR |
|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 48-VQFN (RGZ) 7x7 mm | 48-VQFN (RGZ) - same | 48-VQFN (RGZ) - same | 48-VQFN (RGZ) - same |
| Rail Count | 10 rails | 10 rails | 10 rails | 26 rails |
| GPI Count | 8 (3 GPI pin-selected states) | 8 | 8 | 12 |
| Communication Interface | PMBus / I2C | PMBus / I2C | PMBus / I2C | PMBus / I2C |
| ACPI Support | Yes (S0/S1/S3/S4/S5-style) | Yes | Yes | Yes |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | |
| Fault Logging (non-volatile) | Yes | Yes | Yes (per-rail black-box) |
主な差別化要因
- Pin-compatible upgrade path to higher-rail-count family members （vs UCD90120ARGZR)
- Lower cost for compact 10-rail designs （vs UCD90120ARGZR)
- ACPI pin-selected low-power states on three GPIs （vs UCD9090RGZR)
- Integrated 12-bit ADC with 2.5 V 0.5% internal reference （vs Discrete supervisor chains)
設計ノート
Place the UCD9090RGZ close to the regulators it sequences to keep EN/MARGIN/PGOOD traces short and avoid false fault triggers from coupling. Follow TI's recommended 0.1 uF + 1 uF + 10 uF decoupling scheme at the 3.3 V supply pin; place the smallest value closest to the package. The 48-VQFN (RGZ) 7x7 mm thermal pad must be soldered to a continuous ground pour for thermal and electrical performance, with at least eight thermal vias to inner layers.
Do not exceed the 3.3 V supply rating on V33 pin; the device does not internally regulate. Ensure PMBus pull-ups (typically 2.2-10 kohm) match the host bus voltage (1.8 V or 3.3 V) and do not share pull-ups with incompatible I2C segments. Configure the GPI de-bounce in the Fusion Digital Power Designer GUI to avoid false ACPI state transitions on noisy edges during motor or solenoid switching events.
Although the UCD9090RGZ itself draws only tens of milliamps, it must be sequenced before or after the rails it monitors per system design. In designs where the sequencer is the first rail to come up (recommended for fault isolation), use a small always-on LDO such as TPS7A47 to derive its 3.3 V from a higher standby rail. Validate PMBus clock stretching compatibility with the host controller before committing the BOM, especially with low-end MCUs.
コンプライアンス情報
RoHS and REACH compliant per TI product page; not AEC-Q100 qualified - this part targets industrial/telecom, not automotive. Pin-finish is lead-free matte tin over NiPdAu leadframe.
