EP1K50QC208-3 vs EP1K100QC208-3 비교

다음의 상세 나란히 비교: EP1K50QC208-3 제조: Altera 및 EP1K100QC208-3 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP1K50QC208-3 EP1K100QC208-3
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete NRND
재고 상태 In Stock In Stock
단가 (USD) $12.10 $60.04
Family ACEX 1K —
Logic Elements / Cells 2,880 —
Typical Gates 50,000 —
RAM Bits 40,960 —
Logic Array Blocks (LABs) 360 624
Embedded Array Blocks (EABs) 12 —
User I/O Pins 147 —
Maximum Operating Frequency 166.67 MHz —
Speed Grade -3 -3
Core Supply Voltage 2.5 V 2.5 V
Process Technology 0.22 µm CMOS 0.22 um CMOS
패키지 208-pin PQFP (BFQFP) —
실장 유형 Surface Mount Surface Mount
동작 온도 Commercial (0°C to +70°C) [DATA_NEEDED: exact range] —
Configuration Mode Passive Serial, Active Serial, JTAG —
I/O Standards LVTTL, LVCMOS, PCI —
Design Tool Support Quartus II, MAX+PLUS II —
RoHS 상태 unknown —
Product Family — ACEX 1K
Device Type — FPGA (Field Programmable Gate Array)
Typical Gate Count — 100,000 gates
Number of Logic Elements — 4,992
Total RAM Bits — 49,152 bits
Maximum User I/O — 147
Maximum Internal Clock Frequency — 200 MHz
Package Type — 208-Pin BFQFP (PQFP)
Number of Terminals — 208
Terminal Form — Gull Wing
Package Shape — Square
Temperature Grade — Commercial
RoHS / Lead-Free Suffix — No -N suffix; compliance not verified in retrieved source data
I/O Standards Supported — [DATA_NEEDED: supported I/O standards]
Configuration Memory — SRAM-based loadable PLD

데이터시트 & 자료

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