EP1SGX25FF1020C7 vs EP1SGX25FF1020 비교
다음의 상세 나란히 비교: EP1SGX25FF1020C7 제조: Altera 및 EP1SGX25FF1020 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EP1SGX25FF1020C7 - 25K LE Stratix GX FPGA, 607 I/O, 1020-FBGA | Altera
EP1SGX25FF1020C7 Obsolete사양 비교
| 파라미터 | EP1SGX25FF1020C7 | EP1SGX25FF1020 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $1,280.00 | $295.00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,660 | — |
| Number of LABs/CLBs | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| Number of Gates | [DATA_NEEDED: gate count not provided in source data] | — |
| Supply Voltage - Core | 1.425 V to 1.575 V | — |
| 실장 유형 | Surface Mount | Surface Mount (BGA) |
| 패키지 / 케이스 | 1020-BBGA, FCBGA (33 x 33 mm, 1 mm pitch) | — |
| Supplier Device Package | 1020-FBGA (33x33) | — |
| Logic Family | CMOS | — |
| 동작 온도 | 0 C to 85 C | -40C to +85C (industrial variant) / 0C to +85C (commercial variant) |
| Lead Free | Yes (per digchip datasheet) | — |
| RoHS 상태 | [DATA_NEEDED: not stated in source data] | [DATA_NEEDED: RoHS compliance status] |
| Max Operating Frequency (cited) | 4385.97 MHz (per Arrow listing) | — |
| Process Technology | 1.5 V CMOS | 130 nm CMOS |
| Logic Elements (LE) | — | 25,660 |
| Configurable Logic Blocks (CLB) | — | 2,566 |
| Embedded Memory (bits) | — | 1,944,576 |
| Logic Cells (per FPGAkey) | — | 25,660 |
| Combinatorial Delay (Tpd) | — | 7.49 ns (per Microchip USA datasheet summary) |
| Operating Frequency (max) | — | [DATA_NEEDED: max internal operating frequency] |
| 패키지 | — | 1020-ball FCBGA (PBGA, 1.00 mm pitch) |
| Pin/Package Count | — | 1020 |
| 공급 전압 | — | [DATA_NEEDED: core VCC voltage] |
| Serial Transceivers | — | Embedded SERDES (multi-gigabit, protocol-dependent) |
| DSP Blocks | — | Embedded dedicated multipliers |
| PLL / Clock Management | — | Embedded PLLs |
| Configuration Method | — | SRAM-based, configuration via JTAG / passive serial / fast passive parallel |