EP610PC-15 vs EP910PC-15 비교
다음의 상세 나란히 비교: EP610PC-15 제조: Altera 및 EP910PC-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP610PC-15 | EP910PC-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $17.50 | $12.80 |
| Family | Classic EPLD | Altera Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 300 gates | 900 |
| Macrocells | 16 | 24 |
| Logic Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Maximum Counter Frequency | 100 MHz (per family datasheet) | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 4.75 V to 5.25 V (5 V nominal) |
| Technology | CMOS | — |
| Architecture | PAL-type, sum-of-products AND/OR array | — |
| TTL Emulation | 100% TTL compatible | — |
| 패키지 | PDIP-24 (plastic DIP, 24-pin) | 24-pin PDIP (PDIP-24, 0.300 inch) |
| 핀 수 | 24 pins | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| 실장 유형 | Through-Hole (DIP) | Through-Hole |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] |
| Development Tool | Altera MAX+PLUS II | — |
| Logic Test Circuitry | On-board for AC/DC verification | — |
| Maximum Pin-to-Pin Delay (tpd) | — | 15 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Current (Icc) | — | 80 mA typical |
| Dedicated Inputs | — | 10 |
| Dedicated I/O Pins | — | 12 |
| Process Technology | — | CMOS, UV-erasable |
| Programming Method | — | Altera Logic Programmer card |
| MSL 레벨 | — | Not applicable (through-hole) |