EPC22C20N vs EPC21LC20 비교

다음의 상세 나란히 비교: EPC22C20N 제조: Altera 및 EPC21LC20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPC22C20N EPC21LC20
브랜드 Altera Intel
카테고리 Memory ICs Memory ICs
수명 주기 상태 Obsolete 활성
재고 상태 In Stock In Stock
단가 (USD) $11.40 $10.40
Manufacturer Intel (formerly Altera) —
Device Type Configuration PROM for SRAM-based LUT FPGAs —
Target FPGA Family FLEX 10K, FLEX 6000, APEX 20K series —
Configuration Interface Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) —
Programming Interface IEEE 1149.1 JTAG (in-system programmable) IEEE 1149.1 (JTAG)
공급 전압 3.3 V or 5 V —
패키지 20-pin PLCC (J-lead) —
Package Marking Code EPC22C20N —
핀 수 20 —
실장 유형 Surface Mount / Socket Surface Mount (PLCC socket or solder)
동작 온도 [DATA_NEEDED: operating temperature range] —
Bitstream Capacity [DATA_NEEDED: bitstream capacity in bits] —
Configuration Time [DATA_NEEDED: typical configuration time] —
RoHS 상태 [DATA_NEEDED: RoHS status] [DATA_NEEDED: confirm from Altera product page]
Lead-Free Status [DATA_NEEDED: lead-free status] —
수명 주기 상태 Obsolete (last-time-buy from Altera announced for legacy configuration devices) —
메모리 유형 — Serial Configuration PROM (Flash-based, in-system programmable)
Density — 2 Mb (2,097,152 bits)
Configuration Mode Supported — Serial (PS) for Altera SRAM-based LUT FPGAs
Maximum DCLK Frequency — 10 MHz
Access Time — approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure]
Program/Erase Endurance — 100 cycles minimum [DATA_NEEDED: confirm from datasheet]
Operating Voltage (VCC) — 3.0 V to 3.6 V (3.3 V typical)
Standby Current — [DATA_NEEDED: ICCSB value]
Active Read Current — [DATA_NEEDED: ICC active current]
Operating Temperature (commercial) — 0 °C to +70 °C (LC suffix)
Operating Temperature (industrial) — [DATA_NEEDED: -40 to +85 °C for LI variant]
패키지 / 케이스 — 20-pin PLCC (J-lead, JEDEC MS-018)
MSL 레벨 — [DATA_NEEDED: confirm moisture sensitivity level]
Lead-Free (Pb-free) — [DATA_NEEDED: confirm]
Compatible FPGA Families — ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT)
JTAG Boundary-Scan Compliant — Yes (IEEE Std 1149.1)
Data Width — 1 bit (serial DATA output)

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