EPC22C20N vs EPC21LC20 Comparison
Detailed side-by-side comparison of EPC22C20N by Altera and EPC21LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC22C20N | EPC21LC20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.40 | $10.40 |
| Manufacturer | Intel (formerly Altera) | β |
| Device Type | Configuration PROM for SRAM-based LUT FPGAs | β |
| Target FPGA Family | FLEX 10K, FLEX 6000, APEX 20K series | β |
| Configuration Interface | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) | β |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | IEEE 1149.1 (JTAG) |
| Supply Voltage | 3.3 V or 5 V | β |
| Package | 20-pin PLCC (J-lead) | β |
| Package Marking Code | EPC22C20N | β |
| Pin Count | 20 | β |
| Mounting Type | Surface Mount / Socket | Surface Mount (PLCC socket or solder) |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| Bitstream Capacity | [DATA_NEEDED: bitstream capacity in bits] | β |
| Configuration Time | [DATA_NEEDED: typical configuration time] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm from Altera product page] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | β |
| Lifecycle Status | Obsolete (last-time-buy from Altera announced for legacy configuration devices) | β |
| Memory Type | β | Serial Configuration PROM (Flash-based, in-system programmable) |
| Density | β | 2 Mb (2,097,152 bits) |
| Configuration Mode Supported | β | Serial (PS) for Altera SRAM-based LUT FPGAs |
| Maximum DCLK Frequency | β | 10 MHz |
| Access Time | β | approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] |
| Program/Erase Endurance | β | 100 cycles minimum [DATA_NEEDED: confirm from datasheet] |
| Operating Voltage (VCC) | β | 3.0 V to 3.6 V (3.3 V typical) |
| Standby Current | β | [DATA_NEEDED: ICCSB value] |
| Active Read Current | β | [DATA_NEEDED: ICC active current] |
| Operating Temperature (commercial) | β | 0 Β°C to +70 Β°C (LC suffix) |
| Operating Temperature (industrial) | β | [DATA_NEEDED: -40 to +85 Β°C for LI variant] |
| Package / Case | β | 20-pin PLCC (J-lead, JEDEC MS-018) |
| MSL Level | β | [DATA_NEEDED: confirm moisture sensitivity level] |
| Lead-Free (Pb-free) | β | [DATA_NEEDED: confirm] |
| Compatible FPGA Families | β | ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) |
| JTAG Boundary-Scan Compliant | β | Yes (IEEE Std 1149.1) |
| Data Width | β | 1 bit (serial DATA output) |