EPC2CC20N vs EPC21LC20 비교

다음의 상세 나란히 비교: EPC2CC20N 제조: Altera 및 EPC21LC20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPC2CC20N EPC21LC20
브랜드 Altera Intel
카테고리 FPGA & CPLD Memory ICs
수명 주기 상태 NRND 활성
재고 상태 In Stock In Stock
단가 (USD) $10.85 $10.40
기능 Configuration device for SRAM-based LUT FPGAs —
Density [DATA_NEEDED: bitstream density in bits] 2 Mb (2,097,152 bits)
패키지 PLCC-20 —
Configuration Interface 16-bit parallel (FPP) / Passive Serial (PS) —
Supply Voltage (VCC) 3.3 V —
Programming Interface JTAG (IEEE 1149.1) via ByteBlasterMV / USB-Blaster IEEE 1149.1 (JTAG)
In-System Programmable Yes —
Error Detection 16-bit CRC on configuration frames —
Configuration Modes Supported FPP and PS (depends on host FPGA) —
Cascadable Yes (multiple EPC2 devices for larger bitstreams) —
Open-Drain Status Pin Yes (CONF_DONE / nSTATUS compatible) —
동작 온도 [DATA_NEEDED: industrial/commercial temp range] —
실장 유형 Surface Mount (PLCC-20 socket compatible) Surface Mount (PLCC socket or solder)
MSL 레벨 [DATA_NEEDED: MSL rating] [DATA_NEEDED: confirm moisture sensitivity level]
RoHS 상태 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirm from Altera product page]
메모리 유형 — Serial Configuration PROM (Flash-based, in-system programmable)
Configuration Mode Supported — Serial (PS) for Altera SRAM-based LUT FPGAs
Maximum DCLK Frequency — 10 MHz
Access Time — approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure]
Program/Erase Endurance — 100 cycles minimum [DATA_NEEDED: confirm from datasheet]
Operating Voltage (VCC) — 3.0 V to 3.6 V (3.3 V typical)
Standby Current — [DATA_NEEDED: ICCSB value]
Active Read Current — [DATA_NEEDED: ICC active current]
Operating Temperature (commercial) — 0 °C to +70 °C (LC suffix)
Operating Temperature (industrial) — [DATA_NEEDED: -40 to +85 °C for LI variant]
패키지 / 케이스 — 20-pin PLCC (J-lead, JEDEC MS-018)
Lead-Free (Pb-free) — [DATA_NEEDED: confirm]
Compatible FPGA Families — ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT)
JTAG Boundary-Scan Compliant — Yes (IEEE Std 1149.1)
Data Width — 1 bit (serial DATA output)

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