EPM3128ATC100-5 vs EPM3128ATC100-10NS 비교

다음의 상세 나란히 비교: EPM3128ATC100-5 제조: Intel 및 EPM3128ATC100-10NS 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM3128ATC100-5 EPM3128ATC100-10NS
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $15.43 $6.50
Series MAX 3000A —
Family CPLD - MAX 3000A MAX 3000A
Macrocells 128 —
Usable Gates 2,500 —
User I/Os 80 80
Dedicated Inputs 4 —
Pin-to-Pin Delay (tpd) 5 ns (commercial); 7.5 ns —
Maximum Frequency (fCNT) 192.3 MHz —
Supply Voltage (VCCINT/VCCIO) 3.3 V —
Output Drive Voltage 2.5 V or 3.3 V (programmable) —
Input Tolerance 2.5 V, 3.3 V, 5.0 V tolerant —
Program Memory Type EEPROM —
In-System Programmability Yes, IEEE Std. 1532 compliant —
JTAG Boundary Scan Yes, IEEE Std. 1149.1 —
동작 온도 0 °C to 70 °C (Commercial) [DATA_NEEDED: operating temperature range]
패키지 100-pin TQFP (Fine Line) TQFP-100
실장 유형 Surface Mount Surface Mount
Logic Family CMOS —
RoHS 상태 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Process Technology CMOS EEPROM —
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 128
핀 수 — 100
Pin-to-Pin Logic Delay (tPD) — 10 ns
Counter Frequency (fCNT) — up to 227.3 MHz
Supply Voltage - Core (VCCINT) — 3.3 V
Supply Voltage - I/O (VCCIO) — 3.3 V or 2.5 V (5.0 V-tolerant inputs)
Logic-Level Compatibility — 5.0 V, 3.3 V, 2.5 V
Programmability — In-system (ISP), IEEE Std. 1532
Boundary Scan — IEEE 1149.1 JTAG
Configuration Memory — EEPROM (non-volatile)
Lead-Free — [DATA_NEEDED: lead-free status]

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