EPM3128ATC100-5 vs EPM3128ATI100-5N 비교
다음의 상세 나란히 비교: EPM3128ATC100-5 제조: Intel 및 EPM3128ATI100-5N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Intel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ 활성사양 비교
| 파라미터 | EPM3128ATC100-5 | EPM3128ATI100-5N |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $15.43 | $11.45 |
| Series | MAX 3000A | — |
| Family | CPLD - MAX 3000A | MAX 3000A |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| User I/Os | 80 | — |
| Dedicated Inputs | 4 | — |
| Pin-to-Pin Delay (tpd) | 5 ns (commercial); 7.5 ns | — |
| Maximum Frequency (fCNT) | 192.3 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | — |
| Output Drive Voltage | 2.5 V or 3.3 V (programmable) | — |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | — |
| JTAG Boundary Scan | Yes, IEEE Std. 1149.1 | — |
| 동작 온도 | 0 °C to 70 °C (Commercial) | -40C to +85C (Industrial) |
| 패키지 | 100-pin TQFP (Fine Line) | 100-pin TQFP |
| 실장 유형 | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Compliant (lead-free TQFP package) |
| Process Technology | CMOS EEPROM | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells per LAB) |
| User I/O Pins | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 5.0 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Standard | — | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs |
| Programming Method | — | In-System Programmable via IEEE Std. 1532 (JTAG) |
| Configuration Memory | — | Non-volatile EEPROM |
| JTAG Support | — | IEEE 1149.1 boundary scan |