EPM3512AQC208-10S vs EPM3512AQC208-10-10N 비교

다음의 상세 나란히 비교: EPM3512AQC208-10S 제조: Altera 및 EPM3512AQC208-10-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM3512AQC208-10S EPM3512AQC208-10-10N
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $9.75 $31.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 512 512
Usable Gates 1750 10,000
Logic Array Blocks (LABs) 32 (16 macrocells each) —
패키지 208-pin FineLine BGA-256 208-pin PQFP (Plastic Quad Flat Pack)
User I/Os 208 172
Speed Grade -10 (tPD1 = 7.5 ns) —
Propagation Delay (tPD1) 7.5 ns (pin-to-pin) —
Supply Voltage - VCCINT (internal) 3.3 V —
Supply Voltage - VCCIO (I/O) 2.5 V, 3.3 V, or 5.0 V (MultiVolt) —
Programming Technology CMOS EEPROM —
In-System Programmability (ISP) Yes (IEEE Std. 1149.1 JTAG) —
PCI Compliance Yes (PCI Local Bus Specification Rev 2.2) —
동작 온도 0C to +70C (commercial) 0 °C to +70 °C (commercial)
Boundary-Scan (JTAG) Yes (1149.1 compliant) Yes, IEEE 1149.1
Program/Erase Endurance 100 cycles minimum —
Logic Family CMOS —
Process Technology EEPROM-based CMOS CMOS EEPROM
RoHS 상태 [DATA_NEEDED: rohs_status] —
Logic Elements / LABs — 16 Logic Array Blocks
Propagation Delay (tPD) — 10 ns (-10 speed grade)
Maximum Frequency (fCNT) — 87 MHz
Supply Voltage - Core (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V
In-System Programmability — Yes, IEEE Std. 1532 compliant
PCI-SIG Compliance — PCI Local Bus Specification Rev 2.2 (at -10 speed grade)
실장 유형 — Surface Mount
Lead-Free / RoHS — [DATA_NEEDED: RoHS status]

데이터시트 & 자료

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