EPM5032DC-15 vs EPM5032DC-25 비교

다음의 상세 나란히 비교: EPM5032DC-15 제조: Altera 및 EPM5032DC-25 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5032DC-15 EPM5032DC-25
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete NRND
재고 상태 In Stock In Stock
단가 (USD) $9.95 $3.55
Family MAX 5000 —
Device Type UV-erasable EPLD (PAL-type CMOS) UV Erasable Programmable Logic Device (EPLD)
Usable Gates 600 —
Macrocells 32 32
Propagation Delay (tPD) 15 ns —
Maximum Toggle Frequency (fMAX) 83.3 MHz —
Supply Voltage (VCC) 5 V (nominal) —
Logic Family CMOS, TTL-compatible I/O —
Programmable Pins 16 bidirectional I/O + 4 dedicated input = 20 —
Total Package Pins 28 —
패키지 CERDIP-28 (windowed, through-hole) CDIP-28 (Windowed Ceramic DIP-28)
실장 유형 Through-Hole (DIP) —
동작 온도 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Erasure Method UV light through ceramic quartz window UV light through ceramic window
Process Technology CMOS CMOS, EPROM (UV-Erasable)
RoHS 상태 [DATA_NEEDED: RoHS status] Lead Free / RoHS Compliant (per distributor listings)
Lead-Free unknown —
Manufacturer — Altera (Intel Programmable Solutions Group)
Product Family — MAX 5000
Pin-to-Pin Propagation Delay (tPD) — 25 ns
Maximum Counter Frequency (fCNT) — [DATA_NEEDED: maximum counter frequency]
Setup Time (tSU) — [DATA_NEEDED: setup time]
Number of Dedicated Inputs — 32 (in DIP-28 pinout)
Number of I/O Pins — 22 (in DIP-28 pinout, 4 used as dedicated inputs)
Architecture — PAL-Type, Single-LAB, 32-Macrocell
Output Structure — Programmable I/O with output enable
Flip-Flop Configuration — D, T, JK, or SR (programmable)
Programming Method — UV erase + Altera/Intel MAX+PLUS II programmer

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