EPM5128GC2 vs EPM5128GC-2 비교

다음의 상세 나란히 비교: EPM5128GC2 제조: Altera 및 EPM5128GC-2 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5128GC2 EPM5128GC-2
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $54.00 $8.95
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) —
Macro Cells 128 —
Usable Gates 2.5K —
Logic Array Blocks (LABs) 8 (16 macro cells each) —
Maximum Internal Frequency 50 MHz —
Supply Voltage VCC 5 V —
I/O Pins 64 —
Dedicated Inputs 16 —
패키지 Ceramic PGA (GC, windowed) —
Programmable Flip-Flop Modes D / T / JK / SR (selectable) —
Architecture AND/OR plane + programmable macro cell + PIA —
Process Technology CMOS EPROM —
Reprogrammability UV-erasable (windowed ceramic package) —
동작 온도 [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
RoHS 상태 [DATA_NEEDED: RoHS status] —
Configuration Memory On-chip EPROM (no external boot device) Non-volatile, one-time programmable (erasable via UV)
핀 수 [DATA_NEEDED: total PGA pin count] —
Logic Elements / Gates — 2,500 usable gates
Macrocells — 128
Number of Usable Gates — 2,500
Maximum Operating Frequency — 50 MHz
Propagation Delay (tPD) — Approx. 25 ns (typical, -2 speed grade)
Supply Voltage (VCC) — 5 V (nominal)
Package Type — 68-pin PGA (Pin Grid Array)
Package Code (per Partstack) — WPGA
Number of Terminals — 68
Programming Technology — UV-erasable EPROM
Grade (per Partstack) — COMMERCIAL
Terminal Form — PIN/PEG

데이터시트 & 자료

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