EPM5128LC-1 vs EPM5128JC-1 비교
다음의 상세 나란히 비교: EPM5128LC-1 제조: Altera 및 EPM5128JC-1 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5128LC-1 | EPM5128JC-1 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $8.20 | $24.95 |
| Family | MAX 5000 | MAX 5000 |
| Logic Elements / Macrocells | 128 macrocells | — |
| Number of Usable Gates | [DATA_NEEDED: usable gates] | — |
| Dedicated Inputs | 7 | — |
| Bidirectional I/O Pins | 52 | — |
| Total User I/O | 60 (max) | — |
| Propagation Delay (tpd) | 30 ns | — |
| Supply Voltage (VCC) | 5 V (±10%) | 4.75 V to 5.25 V (5 V nominal) |
| Process Technology | CMOS EPROM, UV-erasable | — |
| Programmability | UV-erasable / OTP (windowed package) | — |
| Package Type | 68-pin J-lead ceramic chip carrier (PLCC windowed) | — |
| 동작 온도 | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| 실장 유형 | Surface Mount (J-lead PLCC socket compatible) | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | non_compliant (ceramic windowed package) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | Erasable Programmable Logic Device (EPLD/CPLD) |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Maximum Operating Frequency | — | 62.5 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 40 ns |
| Technology | — | CMOS, UV-erasable EPROM |
| 패키지 | — | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) |
| Programming Interface | — | JTAG / Altera dedicated programmer |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |
| 수명 주기 상태 | — | Obsolete - last-time-buy inventory only |