EPM5192ALI84-20 vs EPM5192ALC84-15 비교

다음의 상세 나란히 비교: EPM5192ALI84-20 제조: Altera 및 EPM5192ALC84-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192ALI84-20 EPM5192ALC84-15
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $9.90 $13.20
Family MAX 5000 —
Device Type EPLD (UV-erasable / OTP Complex PLD) CPLD / UV-Erasable / OTP Complex PLD
Macrocells 192 192
Process Technology CMOS, EPROM-based CMOS (EPROM-based)
Propagation Delay (tPD) 20 ns (pin-compatible speed grade) 15 ns
User I/O Pins (max) 84 (in PLCC-84 package) —
공급 전압 5 V (single supply, TTL-compatible I/O) —
Operating Temperature Grade Industrial (I) Commercial
Package Code QCCJ (Plastic Leaded Chip Carrier, J-bend) QCCJ
Package Type PLCC-84 (PQCC-84) —
No. of Terminals 84 —
Form of Terminal J-BEND —
실장 유형 Surface Mount (PLCC socket compatible) —
Programmability UV-erasable / one-time programmable (OTP) UV-erasable window / OTP
Logic Type Combinatorial and registered, per-macrocell DFF —
I/O Standard TTL-compatible —
RoHS 상태 [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant] —
Device Family — MAX 5000 (EPM5192)
Dedicated Inputs — 7
User I/O Pins — 64
Propagation Delay (Industry Variant) — 25 ns (per MicrochipUSA listing)
Supply Voltage (VCC) — 4.75 V to 5.25 V (nominal 5 V)
패키지 — 84-pin PLCC (QCCJ, J-bend ceramic)
Terminal Form — J-BEND
Package Shape — SQUARE
Architecture — Programmable Logic Array + Macrocell Registers + PIA interconnect

데이터시트 & 자료

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